Table of Contents
Advertisement
Processor Configuration Registers
6.2.27
SS_CAPID - Subsystem ID and Vendor ID Capabilities
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This capability is used to uniquely identify the subsystem where the PCI device resides.
Because this device is an integrated part of the system and not an add-in device, it is
anticipated that this capability will never be used. However, it is necessary because
Microsoft will test for its presence.
Table 50.
SS_CAPID - Subsystem ID and Vendor ID Capabilities Register
Default
Bit
Access
Value
31:16
RO
0000h
15:8
RO
7:0
RO
6.2.28
SS - Subsystem ID and Subsystem Vendor ID
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
System BIOS can be used as the mechanism for loading the SSID/SVID values. These
values must be preserved through power management transitions and a hardware
reset.
Table 51.
SS - Subsystem ID and Subsystem Vendor ID Register
Default
Bit
Access
Value
31:16
RW-O
0000h
15:0
RW-O
8086h
April 2010
Document Number: 323178-002
RST/
PWR
Core
Reserved
80h
Core
Pointer to Next Capability (PNC)
This contains a pointer to the next item in the capabilities list
which is the PCI Power Management capability.
0Dh
Core
Capability ID (CID)
Value of 0Dh identifies this linked list item (capability structure)
as being for SSID/SSVID registers in a PCI-to-PCI Bridge.
RST/
PWR
Core
Subsystem ID (SSID)
Identifies the particular subsystem and is assigned by the vendor.
Core
Subsystem Vendor ID (SSVID)
Identifies the manufacturer of the subsystem and is the same as
the vendor ID which is assigned by the PCI Special Interest
Group.
®
TM
Intel
Core
i7-620LE/UE, i7-610E, i5-520E and Intel
0/6/0/PCI
88-8Bh
0000800Dh
RO
32 bits
Description
0/6/0/PCI
8C-8Fh
00008086h
RW-O
32 bits
Description
®
Celeron
®
Processor P4500, P4505 Series
Datasheet Addendum
107
Advertisement
Table of Contents
