Pci Express Port Bifurcation; Pci Express* Related Register Structures In The - Intel I5-520E - DATASHEET ADDENDUM Datasheet

Figure 4.

PCI Express* Related Register Structures in the

®
Intel Core
P4500, P4505 Series
2.2.2

PCI Express Port Bifurcation

When bifurcated, the wires which had previously been assigned to lanes 15:8 of the
single x16 primary port (Port 0) are reassigned to lanes 7:0 of the x8 secondary port
(Port 1). This assignment applies whether the lane numbering is reversed or not. The
controls for the secondary port (Port 1) and the associated virtual PCI-to-PCI bridge
can be found in PCI Device 6.
When the primary port is not bifurcated, Device 6 is hidden from the discovery
mechanism used in PCI enumeration, such that configuration of the device is neither
possible nor necessary.
® TM
Intel Core i7-620LE/UE, i7-610E, i5-520E and Intel
Datasheet Addendum
20
TM
i7-620LE/UE, i7-610E, i5-520E and Intel
Port 0
PCI Express
Device
Port 1
PCI Express
Device
®
Celeron
PCI-PCI Bridge
representing root
PCI Express port
(Device 1)
PCI-PCI Bridge
representing root
PCI Express port
(Device 6)
®
Processor P4500, P4505 Series
Interfaces
® ®
Celeron Processor
PCI Compatible
Host Bridge Device
(Device 0)
DMI
April 2010
Document Number: 323178-002