2.5.5
HDR - Header Type Register
This register identifies the header layout of the configuration space.
Device:
Function:
Offset:
Device:
Function:
Offset:
Device:
Function:
Offset:
Device:
Function:
Offset:
Bit
7
6:0
2.5.6
SID/SVID - Subsystem Identity/Subsystem Vendor
Identification Register
This register identifies the manufacturer of the system. This 32-bit register uniquely
identifies any PCI device.
Device:
Function:
Offset:
Device:
Function:
Offset:
Device:
Function:
Offset:
Device:
Function:
Offset:
Access as a Dword
Bit
31:16
15:0
38
0
0-1
0Eh
2
0-1, 4-5
0Eh
3
0-2, 4
0Eh
4-6
0-3
0Eh
Reset
Type
Value
Multi-function Device
RO
1
Selects whether this is a multi-function device, that may have alternative
configuration layouts. This bit is hardwired to 1 for devices in the processor.
Configuration Layout
This field identifies the format of the configuration header layout for a PCI-to-
RO
0
PCI bridge from bytes 10h through 3Fh.
For all devices the default is 00h, indicating a conventional type 00h PCI header.
0
0-1
2Ch, 2Eh
2
0-1, 4-5
2Ch, 2Eh
3
0-2, 4
2Ch, 2Eh
4-6
0-3
2Ch, 2Eh
Reset
Type
Value
Subsystem Identification Number
RWO
8086h
The default value specifies Intel
Vendor Identification Number
RWO
8086h
The default value specifies Intel.
Register Description
Description
Description
Datasheet
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