Scp Transmit/Receive Buffer Descriptor; Scp Transmit/Receive Processing; Serial Management Controllers (Smcs) - Motorola MC68302 User Manual

Integrated multi-protocol processor
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4.6.2 SCP Transmit/Receive Buffer Descriptor
The transmit/receive BO contains the data to be transmitted (written by the
M68000 core) and the received data (written by the SCP). The done
(0)
bit
indicates that the received data is valid and is cleared by the SCP.
15
14
I
D
RESERVED
DATA
4.6.3 SCP Transmit/Receive Processing
The IMP SCP always functions in the master mode. Thus, in a typical ex-
change of messages, the IMP transmits a message to an external peripheral
(SCP slave) which, in turn, sends back a reply. When the IMP works with
more than one slave, it can use the general-purpose parallel
1/0
pins as enable
(select) signals. To begin the data exchange, the M68000 core writes the data
to be transmitted into the transmit/receive BD, setting the done bit. The
M68000 core should then set the start transmit (STA) bit in the SPMODE
register to start transmission of data. STA is cleared by hardware after one
system clock cycle.
Upon recognizing the STA bit, the SCP also begins receiving eight bits of
data. It writes the data into the transmit/receive BD, clears the done bit, and
issues a maskable interrupt to the IMP interrupt controller. When working in
a polled environment, the done bit should be set by the M68000 core before
setting the STA bit so that received replies may be easily recognized by the
software.
4. 7 SERIAL MANAGEMENT CONTROLLERS (SMCs)
The SMC key features are as follows:
4-112
• Two Modes of Operation:
IDL -
SMC1 supports the maintenance channel and SMC2 supports
the auxiliary channel
GCI (IOM-2)-SMC1 supports the monitor channel and SMC2 supports
the C/I channel
• Full-Duplex Operation
• Local Loopback Capability for Testing
MC68302 USER'S MANUAL
MOTOROLA

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