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wakeup mode, the UART receiver is re-enabled by an idle string of
9 to 13 consecutive ones (depending on character length and parity
mode).
01 =In the multidrop mode, an addition address/data bit is transmitted
with each character. The multidrop asynchronous modes are com-
patible with the Motorola MC68681 DUART, the Motorola MC68HC11
SCI interface, and the Motorola DSP56000 SCI interface. ML TD is
also used to select the wakeup mode before enabling the receiver
or issuing the ENTER HUNT MODE command.
Multidrop mode is enabled and an address bit wakeup is selected.
In the address bit wakeup mode, the UART receiver is re-enabled
when the last data bit (the 8th or 9th) in a character is one. This
configuration means that the received character is an address, which
should be processed by all inactive processors. The UART device
compares the address given with its own address and decides whether
to ignore or process the following characters. The IMP receives the
address character and writes it to a new buffer. No address recog-
nition is performed.
10 =The DDCMP protocol is implemented over the asynchronous chan-
nel.
11 = Multidrop mode is enabled as in the 01 case, and the IMP auto-
matically checks the address of the incoming address character and
either accepts or discards the data following the address.
FRZ -
Freeze Transmission
This bit allows the user to halt the UART transmitter and to continue trans-
mission from the next character in the buffer at a later time.
0 =Normal operation (or resume transmission after FRZ is set).
1 =The UART completes transmission of any data already transferred to
the UART FIFO (up to three characters) and then stops transmitting
data.
CL -
Character Length
0 = 7-bit character length
1 = 8-bit character length
RTSM -
RTS Mode
0 = RTS is asserted whenever the transmitter is enabled and there are
characters to transmit. RTS is negated after the last stop bit of a
transmitted character when both the shift register and the transmit
FIFO are empty. RTS is also negated at the end of a buffer to guarantee
accurate reporting of the CTS bit in the BD.
1 = RTS is asserted whenever the transmitter is enabled.
MC68302 USER'S MANUAL
MOTOROLA
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