Power Saving With Sccs - Motorola MC68302 User Manual

Integrated multi-protocol processor
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Promiscuous (Totally Transparent) Mode
To receive the entire serial bit stream transparently, use the BISYNC mode,
which is accomplished by emptying the BISYNC control characters table,
disabling SYNC/DLE stripping, and setting EXSYN (external SYNC) in the
BISYNC mode register. By keeping SYNC asserted, the BISYNC controller
will transfer the entire received bit stream into the receive buffers.
The transmitter can be programmed not to transmit the SYN1-SYN2 char-
acters before the message by setting NTSYNC in the BISYNC mode register.
If this bit setting is combined with the setting of TB, TD, and TR in the
BISYNC transmit BD, then totally transparent transmitter operation is ob-
tained.
All of the above modes assume NMSI mode for the physical layer interface.
!n the multiplexed modes (GCI, IDL, and PCM), the external SYNC pin is used
to achieve the proper bit synchronization on the transparent channel. Note
that the SYNC signal to the BISYNC controller is not connected externally in
the multiplexed modes; the BISYNC controller assumes the signal is always
asserted.
4.5.10 Power Saving with SCCs
4-32
To save power, the SCCs may simply be disabled. Clearing the enable trans-
mitter (ENT) bit in the SCC mode register causes the SCC transmitter to
consume the least possible power; clearing the ENR bit causes a similar
action for the
sec
receiver.
If an SCC transmitter or receiver is not needed for a period of time, it may
be disabled and re-enabled later. In this case, a sequence of operations is
followed.
For the SCC transmitter, the sequence is as follows:
STOP TRANSMIT Command
Clear ENT
RESTART TRANSMIT Command
Set ENT
MC68302 USER'S
MANUAL
MOTOROLA

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