Motorola MC68302 User Manual page 217

Integrated multi-protocol processor
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4-114
SMC1 Reception
The SMC1 receiver can be programmed to work in one of two modes:
Transparent Mode
In this mode, SMC1 receives the data, moves the A and E control bits
transparently into the SMC1 receive BD, and generates a maskable in-
terrupt. The SMC1 receiver discards new data when the M68000 core
has not read the receive BD.
Monitor Channel Protocol
In this mode, SMC1 receives data and handles the A and E control bits
according to the GCI monitor channel protocol. When a received data
byte is stored by the CP in the SMC1 receive BD, a maskable interrupt
is generated.
When using the monitor channel protocol, the user may issue the TRANS-
MIT ABORT REQUEST command. The IMP will then transmit an abort
request on the A bit.
SMC2 Controls the GCI Command/Indication (C/I) Channel
SMC2 Transmission
The M68000 core writes the data byte into the SMC2 Tx BD. SMC2 will
transmit the data continuously on the C/I channel to the physical layer
device.
SMC2 Reception
The SMC2 receiver continuously monitors the C/I channel. When a change
in data is recognized and this value is received in two successive frames,
it will be interpreted as valid data. The received data byte is stored by
the CP in the SMC2 receive BD, and a maskable interrupt is generated.
The receive and transmit clocks are derived from the same physical clock
(L 1 CLK) and are only active while serial data is transferred between the
SMC controllers and the serial interface.
When SMC loopback mode is chosen, SMC transmitted data is routed
to the SMC receiver. Transmitted data appears on the L 1TXD pin, unless
the SDIAG1-SDIAGO bits in the SIMODE register are programmed to
"loopback control" (see 4.4 SERIAL CHANNELS PHYSICAL INTERFACE).
MC68302 USER'S MANUAL
MOTOROLA

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