Uart Event Register - Motorola MC68302 User Manual

Integrated multi-protocol processor
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I - Interrupt
1 =The M68000 core will be interrupted when this buffer has been ser-
viced by the CP.
0 =No interrupt is generated after this buffer has been serviced.
Bits 11, 8-1 - Reserved for future use.
A-Address
This bit is valid only in multidrop mode (ML TD= 1 ).
1 =Set by the M68000 core, this bit indicates that this buffer contains
address character(s). All the buffer's data will be transmitted as ad-
dress characters.
O=This buffer contains data only.
P- Preamble
1 =The UART sends a preamble sequence (set of 9 to 13 bits) before
sending the data.
0 =No preamble sequence is sent.
The following bits are written by the CP after it has finished transmitting the
associated data buffer.
CT-CTS Lost
1 =The CTS signal was negated during transmission.
O =The CTS signal remained active during transmission.
Data Length
The data length is the number of octets that the CP should transmit from
this BD's data buffer. This value should be greater than zero.
Tx Buffer Pointer
The transmit buffer pointer, which always points to the first location of the
associated data buffer, may be even or odd. The buffer may reside in either
internal or external memory.
4.5.11.15 UART EVENT REGISTER. The SCC event register (SCCE) is called the
UART event register when the
sec
is operating as a UART. It is an 8-bit
register used to report events recognized by the UART channel. On recog-
nition of an event, the UART controller will set the corresponding bit in the
UART event register. Interrupts generated by this register may be masked in
the UART mask register.
MOTOROLA
MC68302 USER'S MANUAL
4-49

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