Motorola MC68302 User Manual page 236

Integrated multi-protocol processor
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I
as an open-drain output in NMSI mode. L 1TXD in IDL and PCM mode is a
three-state output. In GCI mode, it is an open-drain output.
RCLK1/L 1CLK -
Receive Clock/Layer-1 clock
This pin is used as an NMSl1 bidirectional receive clock in NMSI mode or
as an input clock in IDL, GCI, and PCM modes. In NMSI mode, this signal
is an input when SCC1 is working with an external clock and is an output
when SCC1 is working with its baud rate generator.
TCLK1/L 1SYO/SDS1 - Transmit Clock/PCM Sync/Serial Data Strobe 1
This pin is used as an NMSl1 bidirectional transmit clock in NMSI mode,
as a sync signal in PCM mode, or as the SDS1 output in IDL/GCI modes.
In NMSI mode, this signal is an input when SCC1 is working with an external
clock and is an output when SCC1 is working with its baud rate generator.
In PCM mode, L1SY1-L1SYO are encoded signals used to create channels
that can be independently routed to the secs.
Table 5-7. PCM Mode Signals
L1SV1
L1SVO
Data (RXD1,TXD11 is Routed to SCC
0
0
TXD1 is Three-Stated, RXD1 is Ignored
0
1
CH-1
1
0
CH-2
1
1
CH-3
NOTE:
CH-1, 2, and 3 are connected to the
secs
as determined
in the SIMCOE register.
In IDL/GCI modes, the SDS2-SDS1 outputs may be used to route the 81 and/
or 82 channels to devices that do not support the IDL or GCI buses. This is
configured in the serial interface mode (SIMODE) and serial interface mask
(SIMASK) registers.
CD1/L1SY1 -
Carrier Detect/Layer-1 Sync
This input is used as the NMSl1 carrier detect (CD) pin in NMSI mode, as
a PCM sync signal in PCM mode, and as an L 1SYNC signal in IDL/GCI
modes.
MOTOROLA
MC68302 USER'S MANUAL
5-13

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