Scc Mode Register (Scm) - Motorola MC68302 User Manual

Integrated multi-protocol processor
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the user selects the appropriate system clock according to the following
equation:
Baud rate= System Clock/Clock Divider/(1 or 4) according to the DIV4 bit
For example, to get the data rate of 64 kbps, the system clock can be 15.36
MHz, DIV4=0, and the Clock Divider=240.
4.5.3 SCC Mode Register (SCM)
Each SCC has a mode register. The functions of bits 5-0 are common to each
protocol. The function of the specific mode bits varies according to the pro-
tocol selected by the MODE1-MODEO bits. They are described in the relevant
sections for each protocol type. Each SCM is a 16-bit, memory-mapped, read-
write register. The SCMs are cleared by reset.
15
SPECIFIC MODE BITS
DIAGl
DIAGO
ENA
ENT
MODEl MODEO
DIAG1-DIAGO- Diagnostic Mode
MOTOROLA
00= Normal operation (CTS, CD lines under automatic control)
In this mode, the CTS and CD lines are monitored by the SCC con-
troller. The SCC controller uses these lines to enable/disable recep-
tion and tranmission.
01 = Loopback mode
In this mode, the transmitter output is internally connected to the
receiver input while the receiver and the transmitter operate nor-
mally. The TXD pin can be programmed either to show the trans-
mitted data or to just remain high. In this mode, the RTS line can
be programmed to either be asserted normally or to remain inactive,
as selected by SDIAG1-SDIAGO in the SIMODE register. The CTS
and CD lines are ignored.
10 =Automatic echo
In this mode, the channel automatically retransmits the received data
on a bit-by-bit basis. The receiver operates normally, but the trans-
mitter simply retransmits the received data. The CTS line is ignored.
11 =Software operation (CTS, CD lines under software control)
In this mode, the CTS and CD lines are just inputs to the SCC event
(SCCE) and status (SCCS) registers. The SCC controller does not use
these lines to enable/disable reception and transmission, but leaves
this task to the user.
MC68302 USER'S MANUAL
4-23

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