On-Chip Clock Generator - Motorola MC68302 User Manual

Table 3-7. DTACK Field Encoding
Bits
15 14 13
Description
0 0 0
No Wait State
0 0
1
1 Wait State
0
1 0 2 Wait States
0 1 1 3 Wait States
1 0 0 4 Wait States
1 0 1 5 Wait States
1 1 0 6 Wait States
1 1 1 External DTACK
When all the bits in this field are set to one, DTACK must be generated
externally, and the IMP or external bus master waits for DTACK (input) to
terminate its bus cycle. After system reset, the bits of the DTACK field
default to six wait states.
The DTACK generator uses the IMP internal clock to generate the pro-
grammable number of wait states. For asynchronous external bus masters,
the programmable number of wait states is counted directly from the in-
ternal clock. When no wait state is programmed (DTACK=OOO), the OT ACK
generator will generate DTACK asynchronously.
The CS lines are asserted slightly earlier for internal IMP master memory
cycles than for an external master using the CS lines. Set external master
wait state IEMWS) in the SCA whenever these timina differences reauire
an extra memory wait state for external masters.
NOTE
Do not assert DTACK externally when it is programmed to be gen-
erated internally.
3.7 ON-CHIP CLOCK GENERATOR
The IMP has an on-chip clock generator that supplies clocks to both the
internal M68000 core and peripherals and to an external pin. The clock cir-
cuitry uses three dedicated pins: EXTAL, XTAL, and CLKO.
MOTOROLA
MC68302 USER'S MANUAL
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