Bisync Mask Register - Motorola MC68302 User Manual

Integrated multi-protocol processor
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7
4
3
2
CTS
I
CD
I - I
TXE
I
RCH
I
BSY
I
TX
I
RX
CTS - Clear-to-Send Status Changed
A change in the status of the serial line was detected on the BISYNC
channel. The SCC status register may be read to determine the current
status.
CD - Carrier Detect Status Changed
A change in the status of the serial line was detected on the BISYNC
channel. The SCC status register may be read to determine the current
status.
Bit 5 - Reserved for future use.
TXE - Tx Error
An error (CTS lost or underrun) occurred on the transmitter channel.
RCH - Receive Character
A character has been received and written to the buffer.
BSY -
Busy Condition
A character was received and discarded due to lack of buffers. The receiver
will resume reception after an ENTER HUNT MODE command.
TX - Tx Buffer
A buffer has been transmitted.
RX -
Rx Buffer
A complete buffer has been received on the BISYNC channel. The channel
closes the buffer due to one of these events:
Reception of a user-defined control character
Reception of an error
Detection of a full receive buffer
4.5.13.13 BISYNC MASK REGISTER.
The SCC mask register (SCCM) is referred to
as the BISYNC mask register when the
sec
is operating as a BISYNC con-
troller. It is an 8-bit read-write register that has the same bit format as the
BISYNC event register. If a bit in the BISYNC mask register is a one, the
corresponding interrupt in the event register will be enabled. If the bit is zero,
the corresponding interrupt in the event register will be masked.
4-84
MC68302 USER'S MANUAL
MOTOROLA

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