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CHAPTER 14 DMA CONTROLLER
Figure 14-10. Setting Example of Consecutively Capturing A/D Conversion Results
Start
DEN1 = 1
DSA1 = 1EH
DRA1 = F380H
DBC1 = 0000H
DMC1 = 2CH
DST1 = 1
Starting A/D conversion
INTAD occurs.
User program
processing
DMA1 transfer
INTDMA1 occurs.
Note
DST1 = 0
DEN1 = 0
RETI
Hardware operation
End
Note The DST1 flag is automatically cleared to 0 when a DMA transfer is completed.
Writing the DEN1 flag is enabled only when DST1 = 0. To terminate a DMA transfer without waiting for
occurrence of the interrupt of DMA1 (INTDMA1), set DST1 to 0 and then DEN1 to 0 (for details, refer to
14.5.7 Forcible termination by software).
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User's Manual U17854EJ9V0UD
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