NEC 78K0R/KE3 User Manual page 197

16-bit single-chip microcontrollers
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Table 6-4. Operations from Count Operation Enabled State to TCR0n Count Start (2/2)
Timer operation mode
• One-count mode
• Capture & one-count mode
(a) Start timing in interval timer mode
<1> Writing 1 to TS0n sets TE0n = 1
<2> The write data to TS0n is held until count clock generation.
<3> TCR0n holds the initial value until count clock generation.
<4> On generation of count clock, the "TDR0n value" is loaded to TCR0n and count starts.
Figure 6-10. Start Timing (In Interval Timer Mode)
TS0n (write)
Count clock
TS0n (write) hold signal
Start trigger detection signal
TCR0n
INTTM0n
Caution In the first cycle operation of count clock after writing TS0n, an error at a maximum of one
clock is generated since count start delays until count clock has been generated. When the
information on count start timing is necessary, an interrupt can be generated at count start
by setting MD0n0 = 1.
CHAPTER 6 TIMER ARRAY UNIT
When TS0n = 0, writing 1 to TS0n bit sets the start trigger wait state.
No operation is carried out from start trigger detection until count clock
generation.
The first count clock loads the value of TDR0n to TCR0n and the subsequent
count clock performs count down operation (see 6.3 (6) (d) Start timing in one-
count mode).
When TS0n = 0, writing 1 to TS0n bit sets the start trigger wait state.
No operation is carried out from start trigger detection until count clock
generation.
The first count clock loads 0000H to TCR0n and the subsequent count clock
performs count up operation (see 6.3 (6) (e) Start timing in capture & one-
count mode).
f
CLK
<1>
TE0n
<2>
Initial value
User's Manual U17854EJ9V0UD
Operation when TS0n = 1 is set
<3>
TDR0n value
When MD0n0 = 1 is set
<4>
197

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