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(14) Bus status detector
This circuit detects whether or not the bus is released by detecting start conditions and stop conditions.
However, as the bus status cannot be detected immediately following operation, the initial status is set by the
STCEN bit.
Remark
STT0 bit:
SPT0 bit:
IICRSV bit: Bit 0 of IIC flag register 0 (IICF0)
IICBSY bit: Bit 6 of IIC flag register 0 (IICF0)
STCF bit:
STCEN bit: Bit 1 of IIC flag register 0 (IICF0)
478
CHAPTER 12 SERIAL INTERFACE IIC0
Bit 1 of IIC control register 0 (IICC0)
Bit 0 of IIC control register 0 (IICC0)
Bit 7 of IIC flag register 0 (IICF0)
User's Manual U17854EJ9V0UD
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