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12.2 Configuration of Serial Interface IIC0
Serial interface IIC0 includes the following hardware.
Registers
Control registers
(1) IIC shift register 0 (IIC0)
IIC0 is used to convert 8-bit serial data to 8-bit parallel data and vice versa in synchronization with the serial
clock. IIC0 can be used for both transmission and reception.
The actual transmit and receive operations can be controlled by writing and reading operations to IIC0.
Cancel the wait state and start data transfer by writing data to IIC0 during the wait period.
IIC0 can be set by an 8-bit memory manipulation instruction.
Reset signal generation clears IIC0 to 00H.
Address: FFF50H
Symbol
IIC0
Cautions 1. Do not write data to IIC0 during data transfer.
2. Write or read IIC0 only during the wait period. Accessing IIC0 in a communication state
other than during the wait period is prohibited. When the device serves as the master,
however, IIC0 can be written only once after the communication trigger bit (STT0) is set to
1.
(2) Slave address register 0 (SVA0)
This register stores local addresses when in slave mode.
SVA0 can be set by an 8-bit memory manipulation instruction.
However, rewriting to this register is prohibited while STD0 = 1 (while the start condition is detected).
Reset signal generation clears SVA0 to 00H.
Address: FFF53H
Symbol
SVA0
Note Bit 0 is fixed to 0.
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CHAPTER 12 SERIAL INTERFACE IIC0
Table 12-1. Configuration of Serial Interface IIC0
Item
IIC shift register 0 (IIC0)
Slave address register 0 (SVA0)
Peripheral enable register 0 (PER0)
IIC control register 0 (IICC0)
IIC status register 0 (IICS0)
IIC flag register 0 (IICF0)
IIC clock select register 0 (IICCL0)
IIC function expansion register 0 (IICX0)
Port mode register 6 (PM6)
Port register 6 (P6)
Figure 12-3. Format of IIC Shift Register 0 (IIC0)
After reset: 00H
R/W
7
6
5
Figure 12-4. Format of Slave Address Register 0 (SVA0)
After reset: 00H
R/W
7
6
5
User's Manual U17854EJ9V0UD
Configuration
4
3
2
4
3
2
1
0
1
0
Note
0
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