Questionable Condition (Fault Register) Group Structure - TDK-Lambda G+1U 5kW User Manual

SCPI register tree shown in Figure 6–1 describes the structure of status, events, faults, messaging,
and service request registers. Condition registers hold a snapshot of the actual state.
The Enable registers can be set by the user to enable SRQ (Service request) in case of a condition
change. Event registers latch condition registers state if the corresponding Enable registers are set
to logical one. The Event registers remain set (latched) until the user reads the register. Reading
the register clears its values until the next event.
Event register does not specify that a single condition event has occurred. In the period where an
event has occurred and user has read the value, the Condition register might change its value
multiple times.
6.2.2

Questionable Condition (Fault Register) Group Structure

Questionable condition fault register group holds a snapshot of the actual faults state of the power
supply at a present time. If a fault occurs, the corresponding bit is set. If a fault is removed, the
corresponding bit is cleared.
Some of the faults might quickly change state (clear faults) before the controlling PC detects it.
Events can be stored in the Event register if the Enable register allows it. Refer to STATUS
subsystem (section 4.15.9) Questionable Condition commands set. Table 6-1 describes bit
configuration of the questionable condition fault register group.
Bit Number
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Table 6-1: Bit Configuration of Questionable Condition Register
NOTE
Decimal Value Bit Symbol
1 0
2 AC
4 OTP
8 FLD
16 OVP
32 SO
64 OFF
128 ILC
256 ENA
512 UVP
1024 PACK
2048 GERR
4096 PERR
8192 PWS
16384 POFF
32768 CWT
164
Description
Not used
AC Fail
Over Temperature Protection
Fold Back Protection
Over Voltage Protection
Shut Off (Daisy)
Output Off
Interlock
Enable
Under Voltage Protection
Parallel Acknowledge
General Error
Parallel Error
Parallel Wait Slave
Power Switch OFF
Comm. Watchdog Timeout