Service Request: Enable And Event Registers; 1.Fault Enable Register; 2.Fault Event Register - TDK-Lambda GEN 8-400 ABCDE User Manual

2u genesys 3.3kw programmable dc power supplies gen 3300w series
Table of Contents

Advertisement

7.11.3. Service Request: Enable and Event Registers

The conditional Registers are continuously monitored. When a change is detected in a
register bit which is enabled, the power supply will generate an SRQ message.
The SRQ message is: "Inn" terminated by CR, where the nn is the power supply
address. The SRQ will be generated either in Local or Remote mode.
Refer to Tables 7-9 to 7-12 for details of the Enable and Event registers.
7.11.3.1. Fault Enable Register
The Fault Enable Register is set to the enable faults SRQs.
Table 7-9: Fault Enable Register (FENA nn, FENA?)
Enable
BIT
bit name
0 (LSB)
Spare bit
1
AC Fail
2
Over Temperature
3
Foldback
4
Over Voltage
5
Shut Off
6
Output Off
7(MSB)
Enable
7.11.3.2. Fault Event Register
The Fault Event will set a bit if a condition occurs and it is Enabled. The register
is cleared when FEVE?, CLS or RST commands are received.
Enable
BIT
bit name
0 (LSB)
Spare bit
1
AC Fail
2
Over Temperature
3
Foldback
4
Over Voltage
5
Shut Off
6
Output Off
7(MSB)
Enable
Fault symbol
SPARE
AC
OTP
FOLD
OVP
SO
OFF
ENA
Table 7-10: Fault Event Register (FEVE?)
Fault symbol
SPARE
AC
OTP
FOLD
OVP
SO
OFF
ENA
85
83503001 Rev G
Bit Set condition
User command: "FENA
User command:
nn" where nn is
"FENA nn" where nn
hexadecimal (if nn="00",
is hexadecimal
no fault SRQs will be
generated).
Bit Set condition
Fault condition occurs
Entire Event Register is
and it is enabled.
cleared when user sends
The fault can set a
"FEVE?" command to
bit, but when the fault
read the register.
clears the bit remains
"CLS" and power-up also
set.
clear the Fault Event
Register. (The Fault Event
Register is not cleared by
RST)
Bit reset condition
Bit reset condition

Advertisement

Table of Contents
loading

Table of Contents