Agilent Technologies 8719ET Service Manual page 263

8719ET/20ET/22ET
8719ES/20ES/22ES
RF Network Analyzers
Figure 10-2 Switch Positions on the A7 CPU Board
Main DRAM − Verifies the A7 CPU main memory (DRAM) with a
4
non-destructive write/read test pattern. A destructive version of this test is
run during power-on.
For additional information, see
Chapter 6 , "Digital Control Troubleshooting."
DSP Wr/Rd − Verifies the ability of the main processor and the DSP
5
(digital signal processor), both on the A7 CPU assembly, to communicate
with each other through DRAM. This also verifies that programs can be
loaded to the DSP, and that most of the main RAM access circuits operate
correctly.
DSP RAM − Verifies the A7 CPU RAM associated with the digital signal
6
processor by using a write/read pattern.
DSP ALU − Verifies the A7 CPU high-speed math processing portions of
7
the digital signal processor.
DSP Intrpt − Tests the ability of the A7 CPU digital signal processor to
8
respond to interrupts from the A10 digital IF ADC.
DIF Control − Tests the ability of the A7 CPU main processor to
9
write/read to the control latches on the A10 digital IF.
DIF Counter − Tests the ability of the A7 CPU main processor to
10
write/read to the triple divider on the A10 CPU. It tests the A7 CPU data
buffers and A10 digital IF, the 4 MHz clock from the A12 reference.
Service Guide
Service Key Menus and Error Messages
Service Menus - Internal Diagnostics
"Internal Tests" on page 10-8 and
10- 9