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Atmel AT91SAM9 Application Note

Nand flash support
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NAND Flash Support in AT91SAM9
1. Scope
The purpose of this application note is to introduce the NAND Flash technology and to
describe how to interface NAND Flash memory to Atmel
based Microcontrollers that do not feature a NAND Flash Controller. The NAND Flash
logic is driven by the Static Memory Controller on the NCS3 address space.
Sample code is provided the associated zip file, Basic NAND Source Code.zip; the
source code is based on the product libV3.
2. NAND Flash Overview
2.1
General Overview
NAND Flash provides a cost effective alternative to hard drives, especially for portable
and handheld systems. The performance, pricing, and memory size options make it
optimal for storage applications (pictures, audio files, etc.).
The NAND Flash used to illustrate this interface is the K9F2G08U0M, manufactured
®
by Samsung
Electronics.
Figure 2-1.
K9F2G08U0M Organization
Microcontrollers
Figure 2-1
shows the memory organization of this device.
®
®
AT91SAM9 ARM
Thumb
®
-
AT91 ARM
Thumb
Microcontrollers
Application
Note
6255B–ATARM–26-Jun-09

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Summary of Contents for Atmel AT91SAM9

  • Page 1 The purpose of this application note is to introduce the NAND Flash technology and to ® ® ® describe how to interface NAND Flash memory to Atmel AT91SAM9 ARM Thumb AT91 ARM based Microcontrollers that do not feature a NAND Flash Controller. The NAND Flash logic is driven by the Static Memory Controller on the NCS3 address space.
  • Page 2 NAND Flash vs. NOR Flash The most important item for memories is the cost per bit which depends on memory cell area per bit. The cell area of NAND Flash is smaller than that of NOR Flash, making the NAND Flash more cost effective than NOR Flash.
  • Page 3 Application Note NAND Flash typically contains blocks that contain errors and cannot be used. A check must be done by software to list and maintain a table of bad blocks. Data integrity is achieved by using hardware or software techniques, such as ECC, that check and correct bad data. 2.2.3 Performances Further differences between NOR and NAND Flash can be found in read/write performances.

  • Page 4: Bad Block Management And Error Corrected Code (Ecc)

    NAND is available in large capacities and is the lowest cost Flash memory available today. NAND is used in virtually all removable cards for cost/density reasons: USB Cards, Memory Stick, MMC Multimedia Card, SD Secure Digital, CF Compact Flash. 3. Bad Block Management and Error Corrected Code (ECC) Definition of “Bad Block”...

  • Page 5: Nand Flash Signals

    Application Note Important Note: Any intentional erasure of the original invalid block information is prohibited. NAND devices are subject to data failures that occur during device operation. To ensure data read/write integrity, system error-checking and correction (ECC) algorithms must be imple- mented.
  • Page 6 Address (ALE = 1, CLE = 0) Addresses are written to the address register on the rising edge of WE# when: • CE# and CLE are low • ALE is high Addresses are input on I/O[7:0] only. For devices with a x16 interface, I/O[15:8] must be written with zeros when issuing an address.

  • Page 7: At91 Ebi Nandflash Logic

    Application Note 5. AT91 EBI NandFlash Logic The NAND Flash logic is driven by the Static Memory Controller (SMC) on the NCS3 address space. Programming the CS3A field in the EBI_CSA Register in the Bus Matrix User Interface to the appropriate value enables the NAND Flash logic. For details on this register, refer to the Bus Matrix User Interface section in the product datasheet.
  • Page 8 Table 5-2. EBI Signals Example for AT91SAM9260 Name Function Type Active Level NANDCS NAND Flash Chip Select Line Output NANDOE NAND Flash Output Enable Output NANDWE NAND Flash Write Enable Output A22/CLE Command Latch Enable Output High A21/ALE Address Latch Enable Output High PIOx/CE...
  • Page 9 Application Note 6. AT91 System Initialization for a K9F2G08U0M Device Clocks The system is running at full speed, this means 198 MHz for the processor and 99 MHz for the Bus. The EBI NCS3 is to be assigned for NAND Flash usage. Table 6-1.
  • Page 10 SMC Timings The K9F2G08U0M is a 256 MB device connected with an 8-bit data bus width. An accurate one-to-one comparison is necessary between NandFlash and SMC waveforms for a complete SMC configuration. Figure 6-1 Figure 6-2 show two cases that highlight all the required timings.
  • Page 11 Application Note Table 6-4. NAND Flash Timings vs. SMC Configuration Value @ Value (ns) SMC Description for “CE don’t Care” SMC Description for Standard 100 MHz Timing Name Min / Max NAND NAND (cycles) tCLS NWE Setup + NWE Pulse N/A - CE is a PIO line tALS NWE Setup + NWE Pulse...
  • Page 12 To fit these requirements the values to program in SMC are: • NRD_SETUP = NWE_SETUP = 1 • NRD_CYCLE = NWE_CYCLE = 5 • NRD_PULSE = NWE_PULSE = 3 • Data Float Time = 2 Therefore all the timings are realized: •...

  • Page 13: Nand Flash Connection Example On At91Sam9260

    Application Note 7. NAND Flash Connection Example on AT91SAM9260 8-bit NAND Flash 7.1.1 Hardware Configuration D[0..7] K9F2G08U0M K9F2G08U0M I/O0 I/O1 NANDOE I/O2 NANDWE I/O3 (ANY PIO) I/O4 I/O5 (ANY PIO) I/O6 I/O7 100NF 100NF 2 Gb 100NF 100NF TSOP48 PACKAGE 7.1.2 Software Configuration The following configuration must be carried out:...

  • Page 14: Nand Flash Access On At91Sam9260

    8. NAND Flash Access on AT91SAM9260 Boot on NAND Flash Each AT91SAM9 product embeds a Boot Program that integrates different programs permitting download and/or upload into the different memories of the product. For the NAND Flash, an initialization phase is done and the NAND Flash Boot program is then executed.
  • Page 15 Application Note • Another PIO line must be declared to handle CE# on standard devices (not “CE don’t Care”). • PC14 PIO line is configured for an NCS3_NANDCS usage. • The corresponding PIO Clock is started. • A NAND Flash identification is done on NCS3 memory space. •...
  • Page 16 SAM-BA allows the user to read, write, erase and verify NAND Flash devices through RS232 or USB interfaces. This feature is not supported on all the AT91SAM9 Microcontrollers (Refer to SAM Boot Assistant (SAM-BA) User Guide for a more detailed description, lit° 6132.

  • Page 17: Revision History

    Application Note Revision History Change Doc. Rev Date Comments Request Ref. 6255A 09-Oct-06 First issue page 1: AT91SAM -> AT91SAM9 3906 6255B 16-Jun-09 Table 6-5 on page 12: NAND Flash support App Note: SMC Timings are not correct 5582 6255B–ATARM–26-Jun-09...
  • Page 18 Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY...

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