I/O Pin Structures - Holtek HT67F2350 Manual

• IFS4 Register – HT67F2370/HT67F2390
Bit 7
Name —
R/W —
POR —
Bit 7~3 Unimplemented, read as "0"
Bit 2 RX2PS: RX2 input source pin selection
0: PB0
1: PG0
Bit 1 RX1PS: RX1 input source pin selection
0: PD1
1: PF6
Bit 0 RX0PS: RX0 input source pin selection
0: PA6
1: PD4

I/O Pin Structures

The accompanying diagram illustrates the internal structures of the I/O logic function. As the exact
logical construction of the I/O pin will differ from this drawing, it is supplied as a guide only to
assist with the functional understanding of the logic function I/O pins. The wide range of pin-shared
structures does not permit all types to be shown.
Data Bus
Write Control Register
Chip RESET
Read Control Register
Write Data Register
Read Data Register
System Wake-up
Rev. 1.60
Advanced A/D Flash MCU with LCD & EEPROM
6 5 4
— — —
— — —
— — —
Pull-high
Control Bit
Register
Select
D Q
CK Q
S
Data Bit
D Q
Q
CK
S
IECM
M
U
X
Wake-up Select
Logic Function Input/Output Structure
130
HT67F2350/HT67F2360
HT67F2370/HT67F2390
3 2 1
— RX2PS RX1PS RX0PS
— R/W R/W
— 0 0
VDD
Weak
Pull-up
I/O pin
PA only
May 16, 2019
0
R/W
0