Holtek HT67F2350 Manual page 188

• SIMD Register
The SIMD register is used to store the data being transmitted and received. The same register is used
by both the SPI and I
be transmitted must be placed in the SIMD register. After the data is received from the I
device can read it from the SIMD register. Any transmission or reception of data from the I
must be made via the SIMD register.
Bit 7
Name D7
R/W R/W
POR x
• SIMA Register
The SIMA register is also used by the SPI interface but has the name SIMC2. The SIMA register is
the location where the 7-bit slave address of the slave device is stored. Bits 7~1 of the SIMA register
define the device slave address. Bit 0 is not implemented.
When a master device, which is connected to the I
slave address in the SIMA register, the slave device will be selected. Note that the SIMA register is
the same register address as SIMC2 which is used by the SPI interface.
Bit 7
Name IICA6
R/W R/W
POR x
Bit 7~1 IICA6~IICA0: I
IICA6~IICA0 is the I
Bit 0 Unimplemented, read as "0".
SIM Control Registers
There are also two control registers for the
is used to control the enable/disable function and to set the data transmission clock frequency. The
SIMC1 register contains the relevant flags which are used to indicate the I
• SIMC0 Register
Bit 7
Name SIM2
R/W R/W
POR 1
SIM2~SIM0: SIM Operating Mode Control
Bit 7~5
000: SPI master mode; SPI clock is f
001: SPI master mode; SPI clock is f
010: SPI master mode; SPI clock is f
011: SPI master mode; SPI clock is f
100: SPI master mode; SPI clock is PTM0 CCRP match frequency/2
101: SPI slave mode
110: I
111: Non SIM function
These bits setup the overall operating mode of the SIM function. As well as selecting
if the I
the SPI Master clock frequency. The SPI clock is a function of the system clock but
can also be chosen to be sourced from PTM0. If the SPI Slave Mode is selected then
the clock will be supplied by an external Master device.
Rev. 1.60
Advanced A/D Flash MCU with LCD & EEPROM
C functions. Before the device writes data to the I
2
6 5 4
D6 D5 D4
R/W R/W R/W
x x x
C bus, sends out an address, which matches the
2
6 5 4
IICA5 IICA4 IICA3
R/W R/W R/W
x x x
C slave address
2
C slave address bit 6 ~ bit 0
2
I C interface, SIMC0 and SIMC1. The register SIMC0
2
6 5 4
SIM1 SIM0 —
R/W R/W —
1 1 —
C slave mode
2
C or SPI function, they are used to control the SPI Master/Slave selection and
2
188
HT67F2350/HT67F2360
HT67F2370/HT67F2390
C bus, the actual data to
2
3 2 1
D3 D2 D1
R/W R/W R/W
x x x
3 2 1
IICA2 IICA1 IICA0
R/W R/W R/W
x x x
C communication status.
2
3 2 1
SIMDEB1 SIMDEB0 SIMEN
R/W R/W R/W
0 0 0
/4
SYS
/16
SYS
/64
SYS
SUB
C bus, the
2
C bus
2
0
D0
R/W
x
"x": unknown
0
—
—
—
"x": unknown
0
SIMICF
R/W
0
May 16, 2019