Mdu Operation - Holtek HT67F2350 Manual

MDUWCTRL Register
Bit 7
Name MDWEF
R/W R
POR 0
Bit 7 MDWEF: 16-bit MDU error flag
0: Normal
1: Abnormal
This bit will be set to 1 if the data register MDUWRn is written or read as the MDU
operation is executing. This bit should be cleared to 0 by reading the MDUWCTRL
register if it is equal to 1 and the MDU operation is completed.
MDWOV: 16-bit MDU overflow flag
Bit 6
0: No overflow occurs
1: Multiplication product > FFFFH or Divisor=0
When an operation is completed, this bit will be updated by hardware to a new value
corresponding to the current operation situation.
Bit 5~0 Unimplemented, read as "0"

MDU Operation

For this MDU the multiplication or division operation is carried out in a specific way and is
determined by the write access sequence of the six MDU data registers, MDUWR0~MDUWR5. The
low byte data, regardless of the dividend, multiplicand, divisor or multiplier, must first be written
into the corresponding MDU data register followed by the high byte data. All MDU operations
will be executed after the MDUWR5 register is write-accessed together with the correct specific
write access sequence of the MDUWRn. Note that it is not necessary to consecutively write data
into the MDU data registers but must be in a correct write access sequence. Therefore, a non-write
MDUWRn instruction or an interrupt, etc., can be inserted into the correct write access sequence
without destroying the write operation. The relationship between the write access sequence and the
MDU operation is shown in the following.
• 32-bit/16-bit division operation: Write data sequentially into the six MDU data registers from
MDUWR0 to MDUWR5.
• 16-bit/16-bit division operation: Write data sequentially into the specific four MDU data registers
in a sequence of MDUWR0, MDUWR1, MDUWR4 and MDUWR5 with no write access to
MDUWR2 and MDUWR3.
• 16-bit/16-bit multiplication operation: Write data sequentially into the specific four MDU data
register in a sequence of MDUWR0, MDUWR4, MDUWR1 and MDUWR5 with no write access
to MDUWR2 and MDUWR3.
After the specific write access sequence is determined, the MDU will start to perform the
corresponding operation. The calculation time necessary for these MDU operations are different.
During the calculation time any read/write access to the six MDU data registers is forbidden. After
the completion of each operation, it is necessary to check the operation status in the MDUWCTRL
register to make sure that whether the operation is correct or not. Then the operation result can
be read out from the corresponding MDU data registers in a specific read access sequence if the
operation is correctly finished. The necessary calculation time for different MDU operations is listed
in the following.
• 32-bit/16-bit division operation: 17 × t
• 16-bit/16-bit division operation: 9 × t
• 16-bit/16-bit multiplication operation: 11 × t
Rev. 1.60
Advanced A/D Flash MCU with LCD & EEPROM
6 5 4
MDWOV — —
R — —
0 — —
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SYS
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SYS
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SYS
240
HT67F2350/HT67F2360
HT67F2370/HT67F2390
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May 16, 2019
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