Writing Data To The Eeprom; Write Protection; Eeprom Interrupt - Holtek HT67F2350 Manual

Advanced a/d flash mcu with lcd & eeprom
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Writing Data to the EEPROM

To write data to the EEPROM, the EEPROM address of the data to be written must first be placed in
the EEA register or EEAL/EEAH register pair and the data placed in the EED register. To initiate a
write cycle the write enable bit, WREN, in the EEC register must first be set high to enable the write
function. After this, the WR bit in the EEC register must be immediately set high to initiate a write
cycle successfully. These two instructions must be executed consecutively. The global interrupt bit
EMI should also first be cleared before implementing any write operations, and then set high again
after the write cycle has started. Note that setting the WR bit high will not initiate a write cycle if
the WREN bit has not been set. As the EEPROM write cycle is controlled using an internal timer
whose operation is asynchronous to microcontroller system clock, a certain time will elapse before
the data will have been written into the EEPROM. Detecting when the write cycle has finished
can be implemented either by polling the WR bit in the EEC register or by using the EEPROM
interrupt. When the write cycle terminates, the WR bit will be automatically cleared to zero by the
microcontroller, informing the user that the data has been written to the EEPROM. The application
program can therefore poll the WR bit to determine when the write cycle has ended.

Write Protection

Protection against inadvertent write operation is provided in several ways. After the device is
powered on, the Write Enable bit in the control register will be cleared preventing any write
operations. Also at power-on the Memory Pointer high byte register, MP1H or MP2H, will be reset
to zero, which means that Data Memory sector 0 will be selected. As the EEPROM control register
is located in sector 1, this adds a further measure of protection against spurious write operations.
During normal program operation, ensuring that the Write Enable bit in the control register is
cleared will safeguard against incorrect write operations.

EEPROM Interrupt

The EEPROM write interrupt is generated when an EEPROM write cycle has ended. The EEPROM
interrupt must first be enabled by setting the DEE bit in the relevant interrupt register. However, as
the EEPROM is contained within a Multi-function Interrupt, the associated multi-function interrupt
enable bit must also be set. When an EEPROM write cycle ends, the DEF request flag and its
associated multi-function interrupt request flag will both be set. If the global, EEPROM and Multi-
function interrupts are enabled and the stack is not full, a jump to the associated Multi-function
Interrupt vector will take place. When the interrupt is serviced only the Multi-function interrupt flag
will be automatically reset, the EEPROM interrupt flag must be manually reset by the application
program.
Rev. 1.60
Advanced A/D Flash MCU with LCD & EEPROM
80
HT67F2350/HT67F2360
HT67F2370/HT67F2390
May 16, 2019

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