Holtek HT67F2350 Manual page 148

Single Pulse Output Mode
To select this mode, bits STnM1 and STnM0 in the STMnC1 register should be set to 10
respectively and also the STnIO1 and STnIO0 bits should be set to 11 respectively. The Single Pulse
Output Mode, as the name suggests, will generate a single shot pulse on the STMn output pin.
The trigger for the pulse output leading edge is a low to high transition of the STnON bit, which
can be implemented using the application program. However in the Single Pulse Output Mode, the
STnON bit can also be made to automatically change from low to high using the external STCKn
pin, which will in turn initiate the Single Pulse output. When the STnON bit transitions to a high
level, the counter will start running and the pulse leading edge will be generated. The STnON bit
should remain high when the pulse is in its active state. The generated pulse trailing edge will be
generated when the STnON bit is cleared to zero, which can be implemented using the application
program or when a compare match occurs from Comparator A.
However a compare match from Comparator A will also automatically clear the STnON bit and thus
generate the Single Pulse output trailing edge. In this way the CCRA value can be used to control
the pulse width. A compare match from Comparator A will also generate a STMn interrupt. The
counter can only be reset back to zero when the STnON bit changes from low to high when the
counter restarts. In the Single Pulse Output Mode CCRP is not used. The STnCCLR and STnDPX
bits are not used in this Mode.
S/W Command
SET"STnON"
STCKn Pin
Transition
STPn Output Pin
Rev. 1.60
Advanced A/D Flash MCU with LCD & EEPROM
CCRA
Leading Edge
STnON bit
or
0 → 1
Single Pulse Generation
148
HT67F2350/HT67F2360
HT67F2370/HT67F2390
CCRA
Trailing Edge
S/W Command
CLR"STnON"
STnON bit
or
1 → 0
CCRA Compare
Match
Pulse Width = CCRA Value
May 16, 2019