Holtek HT67F2350 Manual page 150

Capture Input Mode
To select this mode bits STnM1 and STnM0 in the STMnC1 register should be set to 01 respectively.
This mode enables external signals to capture and store the present value of the internal counter
and can therefore be used for applications such as pulse width measurements. The external signal
is supplied on the STPnI pin, whose active edge can be a rising edge, a falling edge or both rising
and falling edges; the active edge transition type is selected using the STnIO1 and STnIO0 bits in
the STMnC1 register. The counter is started when the STnON bit changes from low to high which is
initiated using the application program.
When the required edge transition appears on the STPnI pin the present value in the counter will be
latched into the CCRA registers and a STMn interrupt generated. Irrespective of what events occur
on the STPnI pin the counter will continue to free run until the STnON bit changes from high to
low. When a CCRP compare match occurs the counter will reset back to zero; in this way the CCRP
value can be used to control the maximum counter value. When a CCRP compare match occurs from
Comparator P, a STMn interrupt will also be generated. Counting the number of overflow interrupt
signals from the CCRP can be a useful method in measuring long pulse widths. The STnIO1 and
STnIO0 bits can select the active trigger edge on the STPnI pin to be a rising edge, falling edge or
both edge types. If the STnIO1 and STnIO0 bits are both set high, then no capture operation will
take place irrespective of what happens on the STPnI pin, however it must be noted that the counter
will continue to run. The STnCCLR and STnDPX bits are not used in this Mode.
Rev. 1.60
Advanced A/D Flash MCU with LCD & EEPROM
150
HT67F2350/HT67F2360
HT67F2370/HT67F2390
May 16, 2019