Holtek HT67F2350 Manual page 60

Bit 2 FWT: Flash memory Write Initiate control
0: Do not initiate Flash memory write or Flash memory write process is completed
1: Initiate Flash memory write process
This bit is set by software and cleared by hardware when the Flash memory write
process is completed.
FRDEN: Flash memory Read Enable control
Bit 1
0: Flash memory read disable
1: Flash memory read enable
Bit 0 FRD: Flash memory Read Initiate control
0: Do not initiate Flash memory read or Flash memory read process is completed
1: Initiate Flash memory read process
This bit is set by software and cleared by hardware when the Flash memory read
process is completed.
• FC1 Register
Bit 7
Name D7
R/W R/W
POR 0
Bit 7~0 D7~D0: Whole chip reset pattern
When user writes a specific value of "55H" to this register, it will generate a reset
signal to reset whole chip.
• FC2 Register
Bit 7
Name —
R/W —
POR —
Bit 7~1 Unimplemented, read as "0"
Bit 0 CLWB: Flash memory Write Buffer Clear control
0: Do not initiate Write Buffer Clear process or Write Buffer Clear process is
1: Initiate Write Buffer Clear process
This bit is set by software and cleared by hardware when the
process
• FARL Register
Bit 7
Name A7
R/W R/W
POR 0
Bit 7~0 Flash Memory Address bit 7 ~ bit 0
• FARH Register – HT67F2350
Bit 7
Name —
R/W —
POR —
Bit 7~5 Unimplemented, read as "0"
Bit 4~0 Flash Memory Address bit 12 ~ bit 8
Rev. 1.60
Advanced A/D Flash MCU with LCD & EEPROM
6 5
D6 D5 D4
R/W R/W R/W
0 0
6 5
— — —
— — —
— — —
completed
is completed.
6 5
A6 A5 A4
R/W R/W R/W
0 0
6 5
— — A12
— — R/W
— —
60
HT67F2350/HT67F2360
HT67F2370/HT67F2390
4 3 2
D3 D2
R/W R/W
0 0 0
4 3 2
— —
— —
— —
Write Buffer Clear
4 3 2
A3 A2
R/W R/W
0 0 0
4 3 2
A11 A10
R/W R/W
0 0 0
1 0
D1 D0
R/W R/W
0 0
1 0
— CLWB
— R/W
— 0
1 0
A1 A0
R/W R/W
0 0
1 0
A9 A8
R/W R/W
0 0
May 16, 2019