Holtek HT67F2350 Manual page 199

HT67F2350/HT67F2360
HT67F2370/HT67F2390
Advanced A/D Flash MCU with LCD & EEPROM
SPIAC1 Register
Bit 7
Name —
R/W —
POR —
Bit 7~6 Unimplemented, read as "0"
Bit 5 SACKPOLB: SPIA clock line base condition selection
0: The SCKA line will be high when the clock is inactive.
1: The SCKA line will be low when the clock is inactive.
The SACKPOLB bit determines the base condition of the clock line, if the bit is high,
then the SCKA line will be low when the clock is inactive. When the SACKPOLB bit
is low, then the SCKA line will be high when the clock is inactive.
Bit 4 SACKEG: SPIA SCKA clock active edge type selection
SACKPOLB=0
0: SCKA is high base level and data capture at SCKA rising edge
1: SCKA is high base level and data capture at SCKA falling edge
SACKPOLB=1
0: SCKA is low base level and data capture at SCKA falling edge
1: SCKA is low base level and data capture at SCKA rising edge
The SACKEG and SACKPOLB bits are used to setup the way that the clock signal
outputs and inputs data on the SPIA bus. These two bits must be configured before
data transfer is executed otherwise an erroneous clock edge may be generated. The
SACKPOLB bit determines the base condition of the clock line, if the bit is high, then
the SCKA line will be low when the clock is inactive. When the SACKPOLB bit is
low, then the SCKA line will be high when the clock is inactive. The SACKEG bit
determines active clock edge type which depends upon the condition of SACKPOLB
bit.
Bit 3 SAMLS: SPIA data shift order
0: LSB first
1: MSB first
This is the data shift select bit and is used to select how the data is transferred, either
MSB or LSB first. Setting the bit high will select MSB first and low for LSB first.
Bit 2 SACSEN: SPIA SCSA
0: Disable
1: Enable
The SACSEN bit is used as an enable/disable for the SCSA pin. If this bit is low, then
the SCSA pin function will be disabled and can be placed into I/O pin or other pin-
shared functions. If the bit is high, the SCSA pin will be enabled and used as a select
pin.
Bit 1 SAWCOL: SPIA
0: No collision
1: Collision
The SAWCOL flag is used to detect whether a data collision has occurred or not.
If this bit is high, it means that data has been attempted to be written to the SPIAD
register during a data transfer operation. This writing operation will be ignored if data
is being transferred. This bit can be cleared by the application program.
Bit 0 SATRF: SPIA Transmit/Receive complete
0: SPIA data is being transferred
1: SPIA data transfer is completed
The SATRF bit is the Transmit/Receive Complete flag and is set to 1 automatically
when an SPIA data transfer is completed, but must cleared to 0 by the application
program. It can be used to generate an interrupt.
Rev. 1.60
6 5 4
— SACKPOLB SACKEG
— R/W R/W
— 0 0
pin control
write collision flag
flag
199
3 2 1
SAMLS SACSEN SAWCOL SATRF
R/W R/W R/W
0 0 0
May 16, 2019
0
R/W
0