Counter Value
0xFFFF
CCRA
CCRP
STnON
STnPAU
STnPOL
CCRA Int. flag
STMnAF
CCRP Int. flag
STMnPF
STMnPF not
generated
STMn O/P
Pin
Output pin set to
initial Level Low if
STnOC=0
Here STnIO [1:0] = 11
Toggle Output select
Note: 1. With STnCCLR=1 a Comparator A match will clear the counter
2. The STMn output pin is controlled only by the STMnAF flag
3. The output pin is reset to its initial state by a STnON bit rising edge
4. A STMnPF flag is not generated when STnCCLR=1
5. n=0 ~ 2
Rev. 1.60
Advanced A/D Flash MCU with LCD & EEPROM
CCRA > 0 Counter cleared by CCRA value
Pause
Output not affected by
STMnAF flag. Remains High
Output Toggle
until reset by STnON bit
with STMnAF flag
Note STnIO [1:0] = 10
Active High Output select
Compare Match Output Mode –STnCCLR=1
144
HT67F2350/HT67F2360
HT67F2370/HT67F2390
STnCCLR = 1; STnM [1:0] = 00
CCRA=0
Resume
Stop
Counter Restart
Output Pin
Reset to Initial value
Output controlled by
other pin-shared function
CCRA = 0
Counter overflow
Time
No STMnAF flag
generated on
CCRA overflow
Output does
not change
Output Inverts
when STnPOL is high
May 16, 2019
Need help?
Do you have a question about the HT67F2350 and is the answer not in the manual?
Questions and answers