Accumulator, Chainout Adder, And Preload Constant For Fixed-Point Arithmetic - Intel Agilex User Manual

2.1.7. Accumulator, Chainout Adder, and Preload Constant for Fixed-Point
Arithmetic
The Intel Agilex variable precision DSP block supports accumulator and adder up to 64
bits for fixed-point arithmetic.
The following signals can dynamically control the function of the accumulator and the
chainout adder:
•
NEGATE
•
LOADCONST
•
ACCUMULATE
•
DISABLE_CHAINOUT
The accumulator and chainout adder features are not available in two fixed-point
arithmetic independent 18 x 19 modes.
Table 7. Accumulator Functions and Dynamic Control Signals
Function
Zeroing Disables the accumulator.
The result is always added to the preload
value. Only one bit of the 64-bit preload
Preload value can be "1". You can use this function
to round the DSP result to any position of
the 64-bit result.
Adds the current result to the previous
Accumulation
accumulate result.
This function takes the current result,
Decimation +
converts it into two's complement, and
Accumulation
adds it to the previous result.
This function takes the current result,
Decimation + converts it into two's complement, and
Chainout Adder adds it to the output of previous DSP
block.
2.1.7.1. Dynamic Chainout
Intel Agilex devices support
enabled. In this feature, the input register is always enabled for the
DISABLE_CHAINOUT
® ™
Intel Agilex Variable Precision DSP Blocks User Guide
18
2. Intel Agilex Variable Precision DSP Blocks Architecture
Description
port which can be dynamically disabled or
CHAINOUT
signal.
UG-20213 | 2019.04.02
NEGATE LOADCONST
0 0
0 1
0 X
1 X
1 0
ACCUMULATE
0
0
1
1
0
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