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Selecting Loop
Suppression
Verification
Figure 7-37 Selecting Loop Suppression Verification
Document Part No. E5500-90024Ed. 1.0
1
Using
Figure 7-37
as a guide, navigate to the Cal tab.
2
In the Cal dialog box, check Verify calculated phase locked loop
suppression and Always Show Suppression Graph. Select If
limit is exceeded: Show Loop Suppression Graph.
3
When you have completed these operations, click the Close
button
.
E5500 Phase Noise Measurement System Version A.02.00
Absolute Measurement Examples
RF Synthesizer using EFC
7
7-55
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