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16
Advanced Software Features
Phase Lock Loop Suppression
16-4
E5500 Phase Noise Measurement System Version A.02.00
Max Error
This is the measured error that still exists between the measured
Loop Suppression and the Adjusted Theoretical Loop Suppression.
The four points on the Loop Suppression graph marked with arrows
(ranging from the peak down to approximately ––8 dB) are the points
over which the Maximum Error is determined. An error of greater
than 1 dB results in an accuracy degradation.
Closed PLL Bandwidth
This is the predicted Phase Lock Loop Bandwidth for the
measurement. The predicted PLL BW is based on the predicted PTR.
The Closed PLL BW will not be adjusted as a result of an accuracy
degradation. If an accuracy degradation is detected, the amount of
error is determined from either the PLL Gain Change or the
Maximum Error, which ever is larger. The degradation itself is 1 dB
less than the greater of these.
Peak Tune Range
This is the Peak Tuning Range (PTR) for the measurement
determined from the VCO Tune Constant and the Tune Range of
VCO. This is the key parameter in determining the PLL properties,
the Drift Tracking Range, and the ability to phase lock sources with
high close in noise.
The PTR displayed should be approximately equal to the product of
the VCO Tune Constant times the Tune Range of VCO. This is not the
case when a significant accuracy degradation is detected (4 dB) by
the Loop Suppression Verification. In this case, the PTR and
Assumed Pole are adjusted when fitting the Theoretical Loop
Suppression to the smoothed measured Loop Suppression, and the
test system will display the adjusted PTR. If the PTR must be
adjusted by more than 1 dB, as indicated by an accuracy degradation
of greater than 0 dB, the Phase Detector Constant or the VCO Tune
Constant is in error at frequency offsets near the PLL BW, or the PLL
BW is being affected by some other problem such as injection locking.
Assumed Pole
This is the frequency of the Assumed Pole required to adjust the
Theoretical Loop suppression to match the smoothed measured Loop
suppression. The Assumed Pole frequency is normally much greater
than the Closed PLL BW. An Assumed Pole frequency of less than 10
X PLL BW is an indication of peaking on the PLL Suppression curve.
For PLL BWs less than 20 kHz, an Assumed Pole of less than 10 X
PLL BW indicates a delay or phase shift in the VCO Tune Port. For
PLL BWs greater than 20 kHz, the Assumed Pole may be adjusted to
less than 10 X PLL BW to account for phase shifts in the test set.
Document Part No. E5500-90024 Ed. 1.0
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