Interrupt Request Flag Register Format - NEC PD78052 User Manual

(1) Interrupt request flag registers (IF0L, IF0H, IF1L)
The interrupt request flag is set to 1 when the corresponding interrupt request is generated or an instruction
is executed. It is cleared to 0 when an instruction is executed upon acknowledgment of an interrupt request
or upon application of RESET input.
IF0L, IF0H, and IF1L are set with a 1-bit or 8-bit memory manipulation instruction. If IF0L and IF0H are used
as a 16-bit register IF0 use a 16-bit memory manipulation instruction for the setting.
RESET input sets these registers to 00H.
Figure 21-2. Interrupt Request Flag Register Format
Symbol <7> <6> <5>
IF0L PIF6 PIF5 PIF4
<7> <6> <5>
IF0H TMIF01 TMIF00 TMIF3
<7> 6 5
Note
IF1L WTIF 0 0
Note WTIF is test input flag. Vectored interrupt request is not generated.
Cautions 1. TMIF4 flag is R/W enabled only when a watchdog timer is used as an interval timer mode.
If a watchdog timer is used in watchdog timer mode 1, set TMIF4 flag to 0.
2. Set always 0 in IF1L bits 3 through 6.
CHAPTER 21 INTERRUPT AND TEST FUNCTIONS
<4> <3> <2> <1> <0>
PIF3 PIF2 PIF1 PIF0 TMIF4
<4> <3> <2> <1> <0>
STIF SRIF SERIF CSIIF1 CSIIF0
4 3 <2> <1> <0>
0 0 ADIF TMIF2 TMIF1
After
Address R/W
Reset
FFE0H 00H R/W
FFE1H 00H R/W
FFE2H 00H R/W
IF Interrupt Request Flag
0 No interrupt request signal
1 Interrupt request signal is generated;
Interrupt request state
489