Format Of Interrupt Request Flag Registers - NEC PD789488 User Manual

(1) Interrupt request flag registers (IF0 to IF2)
An interrupt request flag is set (1) when the corresponding interrupt request is generated, or when an
instruction is executed. It is cleared (0) when the interrupt request is acknowledged, when the RESET signal
is input, or when an instruction is executed.
IF0 to IF2 are set with a 1-bit or 8-bit memory manipulation instruction.
RESET input sets these registers to 00H.
Symbol <7> <6>
IF0 CSIIF10 SRIF20
Symbol <7> <6>
IF1 WTIF ADIF0
Symbol 7 6
IF2 0 0
×× IF×
0 No interrupt request signal generated
1 An interrupt request signal is generated and an interrupt request made
µ
Note PD789489 and 78F9489 only
Cautions 1. The WDTIF flag can be read/written only when the watchdog timer is being used as an
interval timer. It must be cleared to 0 if the watchdog timer is used in watchdog timer
mode 1 or 2.
2. Because P30 to P33 function alternately as external interrupts, when the output level
changes after the output mode of the port function is specified, the interrupt request
flag will be inadvertently set. Therefore, be sure to preset the interrupt mask flag (PMK0
to PMK3) before using the port in output mode.
CHAPTER 16 INTERRUPT FUNCTIONS
Figure 16-2. Format of Interrupt Request Flag Registers
<5> <4> <3>
Note
RINIF PIF3 PIF2
<5> <4> <3>
TMIF61 TMIF60 TMIF50
<5> <4> <3>
Not
Not Note
KRIF01
DFULLIF RENDIF
e
e
User's Manual U15331EJ4V1UD
<2> <1> <0>
PIF1 PIF0 WDTIF
<2> <1> <0>
TMIF20 WTIIF STIF20
<2> <1> <0>
Note
Note
GPIF KRIF00
RERRIF
Interrupt request flag
Address After reset R/W
FFE0H 00H R/W
Address After reset R/W
FFE1H 00H R/W
Address After reset R/W
FFE2H 00H R/W
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