Standby Function Control Register; Oscillation Stabilization Time Select Register Format - NEC PD78052 User Manual

23.1.2 Standby function control register

A wait time after the STOP mode is cleared upon interrupt request till the oscillation stabilizes is controlled with
the oscillation stabilization time select register (OSTS).
OSTS is set with an 8-bit memory manipulation instruction.
RESET input sets OSTS to 04H. However, it takes 2
input.
Figure 23-1. Oscillation Stabilization Time Select Register Format
Symbol 7 6 5
OSTS 0 0 0
Caution The wait time after STOP mode clear does not include the time (see "a" in the illustration below)
from STOP mode clear to clock oscillation start, regardless of clearance by RESET input or by
interrupt request generation.
Remarks 1. f : Main system clock frequency (f
XX
2. f : Main system clock oscillation frequency
X
3. MCS : Bit 0 of oscillation mode select register (OSMS)
4. Values in parentheses apply to operating at f
526
CHAPTER 23 STANDBY FUNCTION
17
4 3 2 1 0
0 0 OSTS2 OSTS1 OSTS0
STOP Mode Clear
X1 Pin
Voltage
Waveform
a
V
SS
X
18
/f , not 2 /f , until the STOP mode is cleared by RESET
X X
After
Address
Reset
FFFAH 04H
Selection of Oscillation Stabilization
Time when STOP Mode is Released
OSTS2 OSTS1 OSTS0
MCS = 1
12 12
0 0 0 2 /f 2
xx
14 14
0 0 1 2 /f 2
xx
15 15
0 1 0 2 /f 2
xx
16 16
0 1 1 2 /f 2
xx
17 17
1 0 0 2 /f 2
xx
Other than above Setting prohibited
or f /2)
X
= 5.0 MHz
X
R/W
R/W
MCS = 0
13
/f (819 s) m 2 /f (1.64 ms)
x x
15
/f (3.28 ms) 2 /f (6.55 ms)
x x
16
/f (6.55 ms) 2 /f (13.1 ms)
x x
17
/f (13.1 ms) 2 /f (26.2 ms)
x x
18
/f (26.2 ms) 2 /f (52.4 ms)
x x