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NEC uPD75P3116 Datasheet

NEC uPD75P3116 Datasheet

Mos integrated circuit 4-bit single-chip microcontroller
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The µ PD75P3116 replaces the µ PD753108's internal mask ROM with a one-time PROM, and features expanded
ROM capacity.
Because the µ PD75P3116 supports programming by users, it is suitable for use in evaluation of systems in the
development stage using the µ PD753104, 753106, or 753108, and for use in small-scale production.
Detailed information about functions is provided in the following User's Manual. Be sure to read it before
designing:
FEATURES
Compatible with µ PD753108
Memory capacity:
• PROM: 16384 × 8 bits
512 × 4 bits
• RAM:
Can be operated in same power supply voltage range as the mask version µ PD753108
• V
= 1.8 to 5.5 V
DD
On-chip LCD controller/driver
TM
QTOP
microcontroller
Remark QTOP microcontrollers are microcontrollers with on-chip one-time PROM that are totally supported by NEC.
This support includes writing application programs, marking, screening, and verification.
ORDERING INFORMATION
Part Number
µ PD75P3116GC-AB8
µ PD75P3116GK-8A8
µ PD75P3116GC-8BS
Caution This device does not provide an internal pull-up resistor connection function by means of mask
option.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. U11369EJ3V0DS00 (3rd edition)
Date Published March 2002 N CP(K)
Printed in Japan
DATA SHEET
4-BIT SINGLE-CHIP MICROCONTROLLER
µ PD753108 User's Manual: U10890E
Package
64-pin plastic QFP (14 × 14)
64-pin plastic LQFP (12 × 12)
64-pin plastic LQFP (14 × 14)
The mark
shows major revised points.
MOS INTEGRATED CIRCUIT
µ PD75P3116
1994

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  • Page 1 = 1.8 to 5.5 V On-chip LCD controller/driver QTOP microcontroller Remark QTOP microcontrollers are microcontrollers with on-chip one-time PROM that are totally supported by NEC. This support includes writing application programs, marking, screening, and verification. ORDERING INFORMATION Part Number µ PD75P3116GC-AB8 64-pin plastic QFP (14 ×...
  • Page 2 FUNCTION OUTLINE Item Instruction execution time Internal memory PROM General-purpose registers I/O ports CMOS input CMOS I/O N-ch open-drain I/O Total LCD controller/driver Timers Serial interface Bit sequential buffer (BSB) Clock output (PCL) Buzzer output (BUZ) Vectored interrupts Test inputs System clock oscillator Standby function Power supply voltage...

  • Page 3: Table Of Contents

    1. PIN CONFIGURATION (TOP VIEW) ... 2. BLOCK DIAGRAM ... 3. PIN FUNCTIONS ... Port Pins ... Non-Port Pins ... Pin I/O Circuits ... 11 Recommended Connection of Unused Pins ... 13 4. Mk I AND Mk II MODE SELECTION FUNCTION ... 14 Differences Between Mk I Mode and Mk II Mode ...

  • Page 4: Pin Configuration (Top View)

    1. PIN CONFIGURATION (TOP VIEW) • 64-pin plastic QFP (14 × 14): µ PD75P3116GC-AB8 • 64-pin plastic LQFP (12 × 12): µ PD75P3116GK-8A8 • 64-pin plastic LQFP (14 × 14): µ PD75P3116GC-8BS 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 BIAS P30/LCDCL/MD0 P31/SYNC/MD1...
  • Page 5 PIN IDENTIFICATIONS P00 to P03: Port 0 P10 to P13: Port 1 P20 to P23: Port 2 P30 to P33: Port 3 P50 to P53: Port 5 P60 to P63: Port 6 P80 to P83: Port 8 P90 to P93: Port 9 KR0 to KR3: Key return 0 to 3...

  • Page 6: Block Diagram

    2. BLOCK DIAGRAM Watch BUZ/P23 timer INTW f Basic counter (14) interval timer/ watchdog timer INTBT TI0/P13 8-bit timer/event PTO0/P20 counter #0 INTT0 TOUT0 INTT1 TI1/TI2/ 8-bit P12/INT2 Cascaded timer/event 16-bit PTO1/P21 counter #1 timer/ PTO2/ 8-bit event 16384 × 8 bits timer/event PCL/P22 counter...

  • Page 7: Pin Functions

    3. PIN FUNCTIONS 3.1 Port Pins (1/2) Pin Name Alternate Function Input INT4 SO/SB0 SI/SB1 Input INT0 INT1 TI1/TI2/INT2 PTO0 PTO1 PCL/PTO2 LCDCL/MD0 SYNC/MD1 Note 2 Note 2 Note 2 Note 2 Notes 1. Circuit types enclosed in angle brackets indicate Schmitt-triggered input. 2.
  • Page 8 3.1 Port Pins (2/2) Pin Name Alternate Function KR0/D0 KR1/D1 KR2/D2 KR3/D3 Notes 1. Circuit types enclosed in angle brackets indicate Schmitt-triggered input. 2. Do not connect an internal pull-up resistor by software when these pins are used as segment signal outputs. Function Programmable 4-bit I/O port (Port 6) Input and output can be specified in 1-bit units.

  • Page 9: Non-Port Pins

    3.2 Non-Port Pins (1/2) Pin Name Alternate Function Input P12/INT2/TI2 P12/INT2/TI1 PTO0 Output P20 PTO1 PTO2 P22/PCL P22/PTO2 SO/SB0 SI/SB1 INT4 Input INT0 Input INT1 INT2 Input P12/TI1/TI2 KR0 to KR3 P60 to P63 Input — — Input — — RESET Input —...
  • Page 10 3.2 Non-Port Pins (2/2) Pin Name Alternate Function S0 to S15 Output — S16 to S19 Output P93 to P90 S20 to S23 Output P83 to P80 COM0 to COM3 Output — to V — — BIAS Output — LCDCL Note 3 Output P30/MD0 Note 3...

  • Page 11: Pin I/O Circuits

    3.3 Pin I/O Circuits The I/O circuits for the µ PD75P3116’s pins are shown in abbreviated form below. Type A P-ch N-ch CMOS standard input buffer Type B Schmitt-triggered input with hysteresis characteristics. Type B-C P.U.R. P.U.R. P-ch enable P.U.R. : Pull-Up Resistor Type D Data Output...
  • Page 12 Type F-B P.U.R. enable Output disable Data Output disable Output disable P.U.R. : Pull-Up Resistor Type G-A P-ch N-ch P-ch N-ch P-ch data P-ch N-ch N-ch Type G-B P-ch N-ch P-ch N-ch P-ch N-ch data N-ch P-ch P-ch N-ch N-ch Type H P.U.R.

  • Page 13: Recommended Connection Of Unused Pins

    3.4 Recommended Connection of Unused Pins Table 3-1. List of Unused Pin Connections P00/INT4 P01/SCK P02/SO/SB0 P03/SI/SB1 P10/INT0 and P11/INT1 P12/TI1/TI2/INT2 P13/TI0 P20/PTO0 P21/PTO1 P22/PTO2/PCL P23/BUZ P30/LCDCL/MD0 P31/SYNC/MD1 P32/MD2 P33/MD3 P50/D4 to P53/D7 P60/KR0/D0 to P63/KR3/D3 S0 to S15 COM0 to COM3 S16/P93 to S19/P90 S20/P83 to S23/P80 to V...

  • Page 14: Mk I And Mk Ii Mode Selection Function

    4. Mk I AND Mk II MODE SELECTION FUNCTION Setting the stack bank selection (SBS) register for the µ PD75P3116 enables the program memory to be switched between the Mk I mode and Mk II mode. This function is applicable when using the µ PD75P3116 to evaluate the µ...

  • Page 15: Setting Of Stack Bank Selection (Sbs) Register

    4.2 Setting of Stack Bank Selection (SBS) Register Use the stack bank selection register to switch between the Mk I mode and Mk II mode. Figure 4-1 shows the format of the stack bank selection register. The stack bank selection register is set using a 4-bit memory manipulation instruction. When using the Mk I mode, be sure to initialize the stack bank selection register to 100×B be sure to initialize it to 000×B Note...

  • Page 16: Differences Between Μ Pd75P3116 And Μ Pd753104, 753106, 753108

    5. DIFFERENCES BETWEEN µ PD75P3116 AND µ PD753104, 753106, 753108 The µ PD75P3116 replaces the internal mask ROM in the µ PD753104, 753106, and 753108 with a one-time PROM and features expanded ROM capacity. The µ PD75P3116’s Mk I mode supports the Mk I mode in the µ PD753104, 753106, and 753108 and the µ...

  • Page 17: Memory Configuration

    6. MEMORY CONFIGURATION 0000H Internal reset start address (higher 6 bits) Internal reset start address (lower 8 bits) 0002H INTBT/INT4 start address (higher 6 bits) INTBT/INT4 start address (lower 8 bits) 0004H INT0 start address (higher 6 bits) INT0 start address (lower 8 bits) 0006H INT1 start address (higher 6 bits) INT1 start address (lower 8 bits)
  • Page 18 General-purpose register area Note Stack area Data area static RAM (512 × 4) Display data memory Peripheral hardware area Note Memory bank 0 or 1 can be selected as the stack area. Figure 6-2. Data Memory Map Data memory 000H (32 ×...

  • Page 19: Instruction Set

    7. INSTRUCTION SET (1) Representation and coding formats for operands In the instruction’s operand area, use the following coding format to describe operands corresponding to the instruction’s operand representations (for further details, refer to the RA75X Assembler Package Language User’s Manual (U12385E)).
  • Page 20 (2) Operation conventions A register; 4-bit accumulator B register C register D register E register H register L register X register Register pair (XA); 8-bit accumulator Register pair (BC) Register pair (DE) Register pair (HL) XA’: Expansion register pair (XA’) BC’: Expansion register pair (BC’) DE’:...
  • Page 21 (3) Description of symbols used in addressing area MB = MBE • MBS MBS = 0, 1, 15 MB = 0 MBE = 0: MB = 0 (000H to 07FH) MB = 15 (F80H to FFFH) MBE = 1: MB = MBS MBS = 0, 1, 15 MB = 15, fmem = FB0H to FBFH, FF0H to FFFH MB = 15, pmem = FC0H to FFFH...
  • Page 22 Instruction Mnemonic Operand Group Transfer A, #n4 reg1, #n4 XA, #n8 HL, #n8 rp2, #n8 A, @HL A, @HL+ A, @HL– A, @rpa1 XA, @HL @HL, A @HL, XA A, mem XA, mem mem, A mem, XA A, reg XA, rp’ reg1, A rp’1, XA A, @HL...
  • Page 23 Instruction Mnemonic Operand Group Bit transfer MOV1 CY, fmem.bit CY, pmem.@L CY, @H+mem.bit fmem.bit, CY pmem.@L, CY @H+mem.bit, CY Arithmetic ADDS A, #n4 XA, #n8 A, @HL XA, rp’ rp’1, XA ADDC A, @HL XA, rp’ rp’1, XA SUBS A, @HL XA, rp’...
  • Page 24 Instruction Mnemonic Operand Group Comparison reg, #n4 @HL, #n4 A, @HL XA, @HL A, reg XA, rp’ Carry flag SET1 manipulation CLR1 NOT1 Memory bit SET1 mem.bit manipulation fmem.bit pmem.@L @H+mem.bit CLR1 mem.bit fmem.bit pmem.@L @H+mem.bit mem.bit fmem.bit pmem.@L @H+mem.bit mem.bit fmem.bit pmem.@L...
  • Page 25 Instruction Mnemonic Operand Group Note 1 Branch addr addr1 !addr $addr $addr1 PCDE PCXA BCDE BCXA Note 1 !addr1 BRCB !caddr Notes 1. The sections in double boxes are only supported in the Mk II mode. The other sections are only supported in the MK I mode.
  • Page 26 Instruction Mnemonic Operand Group Subroutine CALLA Note !addr1 stack control CALL Note !addr Note CALLF !faddr Note Note RETS RETI Note Note The sections in double boxes are only supported in the Mk II mode. The other sections are only supported in the Mk I mode. No.
  • Page 27 Instruction Mnemonic Operand Group Subroutine PUSH stack control Interrupt control IE××× IE××× Note 1 A, PORTn XA, PORTn Note 1 PORTn, A PORTn, XA CPU control HALT STOP Special Notes 2, 3 GETI taddr Notes 1. Setting MBE = 0 or MBE = 1, MBS = 15 is required during the execution of the IN or OUT instruction. 2.

  • Page 28: One-Time Prom (Program Memory) Write And Verify

    8. ONE-TIME PROM (PROGRAM MEMORY) WRITE AND VERIFY The program memory contained in the µ PD75P3116 is a 16384 × 8-bit one-time PROM that can be electrically written one time only. The pins listed in the table below are used for this PROM’s write/verify operations. Clock input from the X1 pin is used instead of address input as a method for updating addresses.

  • Page 29: Program Memory Write Procedure

    8.2 Program Memory Write Procedure Program memory can be written at high speed using the following procedure. (1) Pull down unused pins to Vss via resistors. Set the X1 pin to low. (2) Supply 5 V to the V and V (3) Wait 10 µ...

  • Page 30: Program Memory Read Procedure

    8.3 Program Memory Read Procedure The µ PD75P3116 can read program memory contents using the following procedure. (1) Pull down unused pins to V via resistors. Set the X1 pin to low. (2) Supply 5 V to the V and V pins.

  • Page 31: One-Time Prom Screening

    8.4 One-Time PROM Screening Due to its structure, the one-time PROM cannot be fully tested before shipment by NEC. Therefore, NEC recommends that after the required data is written and the PROM is stored under the temperature and time conditions shown below, the PROM should be verified via screening.

  • Page 32: Electrical Specifications

    9. ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings (T = 25˚C) Parameter Symbol Power supply voltage PROM power supply voltage Input voltage Except port 5 Port 5 (N-ch open drain) Output voltage Output current, high Per pin Total of all pins Output current, low Per pin Total of all pins Operating ambient...
  • Page 33 Main System Clock Oscillator Characteristics (T Resonator Recommended Constant Ceramic resonator Crystal resonator External clock Notes 1. Indicates only oscillator characteristics. Refer to AC Characteristics for instruction execution time. When the power supply voltage is 1.8 V ≤ V ≤ 6.0 MHz, setting the processor clock control register (PCC) to 0011 makes 1 machine cycle less than the required 0.95 µ...
  • Page 34 Subsystem Clock Oscillator Characteristics (T Resonator Recommended Constant Crystal resonator External clock Notes 1. Indicates only oscillator characteristics. Refer to AC Characteristics for instruction execution time. The oscillation stabilization time is necessary for oscillation to stabilize after applying V Caution When using the subsystem clock oscillator, wire as follows in the area enclosed by the broken lines in the above figures to avoid an adverse effect from wiring capacitance.
  • Page 35 DC Characteristics (T = –40 to +85˚C, V Parameter Symbol Output current, low Per pin Total of all pins Input voltage, high Ports 2, 3, 8, and 9 Ports 0, 1, 6, RESET Port 5 (N-ch open-drain) X1, XT1 Input voltage, low Ports 2, 3, 5, 8, and 9 Ports 0, 1, 6, RESET X1, XT1...
  • Page 36 DC Characteristics (T = –40 to +85˚C, V Parameter Symbol LCD drive voltage VAC0 = 0 VAC0 = 1 VAC current Note 1 VAC0 = 1, V lo = ±1.0 µ A LCD output voltage deviation Note 2 (common) lo = ±0.5 µ A LCD output voltage deviation Note 2...
  • Page 37 AC Characteristics (T = –40 to +85˚C, V Parameter Symbol CPU clock cycle Operating on time Note 1 main system clock (Min. instruction execution Operating on subsystem clock time = 1 machine cycle) TI0, TI1, TI2 input = 2.7 to 5.5 V frequency = 1.8 to 5.5 V TI0, TI1, TI2 input...
  • Page 38 Serial Transfer Operation 2-wire and 3-wire serial I/O mode (SCK...Internal clock output): (T Parameter Symbol SCK cycle time = 2.7 to 5.5 V KCY1 = 1.8 to 5.5 V SCK high-/low-level = 2.7 to 5.5 V width = 1.8 to 5.5 V Note 1 setup time = 2.7 to 5.5 V...
  • Page 39 SBI mode (SCK...Internal clock output (master)): (T Parameter Symbol SCK cycle time = 2.7 to 5.5 V KCY3 = 1.8 to 5.5 V SCK high-/low-level = 2.7 to 5.5 V width = 1.8 to 5.5 V SB0, 1 setup time = 2.7 to 5.5 V SIK3 (to SCK↑)
  • Page 40 AC Timing Test Points (Excluding X1, XT1 Input) Clock Timing X1 input XT1 input TI0, TI1, TI2 Timing TI0, TI1, TI2 (MIN.) (MIN.) (MAX.) (MAX.) (MIN.) (MIN.) (MAX.) (MAX.) Data Sheet U11369EJ3V0DS µ PD75P3116 – 0.1 V 0.1 V – 0.1 V 0.1 V...
  • Page 41 Serial Transfer Timing 3-wire serial I/O mode KSO1, 2 2-wire serial I/O mode SB0, 1 KCY1, 2 KL1, 2 KH1, 2 SIK1, 2 KSI1, 2 Input data Output data KCY1, 2 KL1, 2 KH1, 2 SIK1, 2 KSI1, 2 KSO1, 2 Data Sheet U11369EJ3V0DS µ...
  • Page 42 Serial Transfer Timing Bus release signal transfer SB0, 1 Command signal transfer SB0, 1 Interrupt input timing INT0, 1, 2, 4 KR0 to 7 RESET input timing RESET KCY3, 4 KL3, 4 KH3, 4 KSO3, 4 KCY3, 4 KL3, 4 KH3, 4 SIK3, 4 KSO3, 4...
  • Page 43 Data Memory Stop Mode Low Supply Voltage Data Retention Characteristics (T Parameter Symbol Release signal set time SREL Oscillation stabilization Release by RESET WAIT Note 1 wait time Release by interrupt request Notes 1. The oscillation stabilization wait time is the time during which the CPU operation is stopped to prevent unstable operation at the start of oscillation.
  • Page 44 Data Retention Timing (STOP Mode Release by RESET) STOP instruction execution RESET Data Retention Timing (Standby Release Signal: STOP Mode Release by Interrupt Signal) STOP instruction execution Standby release signal (Interrupt request) Internal reset operation STOP mode Data retention mode SREL STOP mode Data retention mode...
  • Page 45 DC Programming Characteristics (T Parameter Symbol Input voltage, high Input voltage, low Input leakage current Output voltage, high Output voltage, low power supply current power supply current Cautions 1. Do not exceed +13.5 V for V 2. V must be applied before V AC Programming Characteristics (T Parameter Address setup time...
  • Page 46 Program Memory Write Timing D0/P60 to D3/P60 Data input D4/P50 to D7/P53 MD0/P30 MD1/P31 MD2/P32 MD3/P33 Program Memory Read Timing D0/P60 to D3/P60 D4/P50 to D7/P53 MD0/P30 MD1/P31 MD2/P32 M3SR MD3/P33 Data output Data input Data output Data output Data Sheet U11369EJ3V0DS µ...

  • Page 47: Characteristic Curves (Reference Values)

    10. CHARACTERISTIC CURVES (REFERENCE VALUES) vs V 0.05 0.01 0.005 0.001 (Main System Clock: 6.0 MHz Crystal Resonator) Crystal resonator 6.0 MHz 22 pF 22 pF Supply voltage V Data Sheet U11369EJ3V0DS µ µ µ µ µ PD75P3116 = 25°C) PCC = 0011 PCC = 0010 PCC = 0001...
  • Page 48 vs V 0.05 0.01 0.005 0.001 (Main System Clock: 4.19 MHz Crystal Resonator) PCC = 0011 PCC = 0010 PCC = 0001 PCC = 0000 Main system clock HALT mode + 32 kHz oscillation Subsystem clock operation mode (SOS.1 = 0) Subsystem clock HALT mode (SOS.1 = 0) and main system clock STOP mode...

  • Page 49: Package Drawings

    11. PACKAGE DRAWINGS 64-PIN PLASTIC QFP (14x14) NOTE Each lead centerline is located within 0.15 mm of its true position (T.P.) at maximum material condition. Data Sheet U11369EJ3V0DS µ PD75P3116 detail of lead end ITEM MILLIMETERS 17.6±0.4 14.0±0.2 14.0±0.2 17.6±0.4 0.37 +0.08 -0.07 0.15...
  • Page 50 64-PIN PLASTIC LQFP (12x12) NOTE Each lead centerline is located within 0.13 mm of its true position (T.P.) at maximum material condition. Data Sheet U11369EJ3V0DS µ PD75P3116 detail of lead end ITEM MILLIMETERS 14.8±0.4 12.0±0.2 12.0±0.2 14.8±0.4 1.125 1.125 0.32±0.08 0.13 0.65 (T.P.) 1.4±0.2...
  • Page 51 64-PIN PLASTIC LQFP (14x14) NOTE Each lead centerline is located within 0.20 mm of its true position (T.P.) at maximum material condition. Data Sheet U11369EJ3V0DS µ PD75P3116 detail of lead end ITEM MILLIMETERS 17.2±0.2 14.0±0.2 14.0±0.2 17.2±0.2 0.37 +0.08 -0.07 0.20 0.8 (T.P.) 1.6±0.2...

  • Page 52: Recommended Soldering Conditions

    For details of recommended soldering conditions, refer to the information document Semiconductor Device Mounting Technology Manual (C10535E). For soldering methods and conditions other than those recommended below, contact an NEC Sales representative. Table 12-1. Surface Mounting Type Soldering Conditions (1/2) (1) µ...
  • Page 53 Table 12-1. Surface Mounting Type Soldering Conditions (2/2) (3) µ PD75P3116GC-8BS: 64-pin plastic LQFP (14 × 14) Soldering Method Infrared reflow Package peak temperature: 235°C, Time: 30 seconds max. (at 210°C or higher), Count: Twice or less Package peak temperature: 215°C, Time: 40 seconds max. (at 200°C or higher), Count: Twice or less Wave soldering Solder bath temperature: 260°C max., Time: 10 seconds max., Count: Once,...

  • Page 54: Appendix A. List Of Μ Pd75308B, 753108, And 75P3116 Functions

    APPENDIX A. LIST OF µ PD75308B, 753108, AND 75P3116 FUNCTIONS Parameter Program memory Mask ROM 0000H to 1F7FH (8064 × 8 bits) Data memory 75X Standard 0.95, 1.91, 15.3 µ s Instruction When main system execution clock is selected (during 4.19 MHz operation) time 122 µ...
  • Page 55 Parameter Φ, 524, 262, 65.5 kHz Clock output (PCL) (Main system clock: during 4.19 MHz operation) • Φ, 750, 375, 93.8 kHz BUZ output (BUZ) 2 kHz (Main system clock: during 4.19 MHz operation) Serial interface 3 modes are available •...

  • Page 56: Appendix B. Development Tools

    APPENDIX B. DEVELOPMENT TOOLS The following development tools have been provided for system development using the µ PD75P3116. In the 75XL Series, a common relocatable assembler is used in combination with a device file dedicated to each model. RA75X relocatable assembler Host Machine PC-9800 Series IBM PC/AT™...
  • Page 57 PROM Write Tools Hardware PG-1500 This is a PROM writer that can program a single-chip microcontroller with PROM in stand-alone mode or under the control of a host machine when connected with the supplied accessory board and optional programmer adapter. It can also program typical PROMs in capacities ranging from 256 Kb to 4 Mb.
  • Page 58 Debugging Tools An in-circuit emulator (IE-75001-R) is provided as a program debugging tool for the µ PD75P3116. The system configuration using this in-circuit emulator is shown below. Hardware IE-75001-R The IE-75001-R is an in-circuit emulator to be used for hardware and software debugging during development of application systems using the 75X or 75XL Series products.
  • Page 59 OS for IBM PCs The following operating systems for IBM PCs are supported. Version PC DOS Ver.3.1 to 6.3 J6.1/V Note to J6.3/V Note MS-DOS Ver.5.0 to 6.2 5.0/V Note to 6.2/V Note IBM DOS J5.02/V Note Note Only English mode is supported. Caution Ver.
  • Page 60 Package Drawing and Recommended Footprint of Conversion Socket (EV-9200GC-64) Figure B-1. EV-9200GC-64 Package Drawing (For Reference Only) EV-9200GC-64 No.1 pin index EV-9200GC-64-G0E ITEM MILLIMETERS 18.8 14.1 14.1 18.8 4-C 3.0 15.8 18.5 15.8 18.5 1.35 0.35 ± 0.1 Data Sheet U11369EJ3V0DS µ...
  • Page 61 Figure B-2. EV-9200GC-64 Recommended Footprint (For Reference Only) ITEM MILLIMETERS 19.5 14.8 0.8 ± 0.02 × 15=12.0 ± 0.05 0.8 ± 0.02 × 15=12.0 ± 0.05 14.8 19.5 6.00 ± 0.08 6.00 ± 0.08 0.5 ± 0.02 2.36 ± 0.03 2.2 ±...
  • Page 62 Package Drawing of Conversion Adapter (TGK-064SBW) Figure B-3. TGK-064SBW Package Drawing (For Reference Only) G F E D ITEM MILLIMETERS INCHES ITEM 18.4 0.724 0.65x15=9.75 0.026x0.591=0.384 0.65 0.026 7.75 0.305 10.15 0.400 12.55 0.494 14.95 0.589 0.65x15=9.75 0.026x0.591=0.384 11.85 0.467 18.4 0.724 C 2.0...
  • Page 63 Notes on Target System Design The following shows a diagram of the connection conditions between the emulation probe, conversion connector and conversion socket or conversion adapter. Design your system making allowances for conditions such as the form of parts mounted on the target system, as shown below.
  • Page 64 Figure B-6. Connection Conditions of Target System (1) In-circuit emulator IE-75001-R External sense clips Conversion socket EV-9200GC-64 Figure B-7. Connection Conditions of Target System (2) In-circuit emulator IE-75001-R External sense clips Ground clip 35 mm 18.5 mm Target system Ground clip 9 mm Conversion adapter TGK-064SBW...

  • Page 65: Appendix C. Related Documents

    APPENDIX C. RELATED DOCUMENTS The related documents indicated in this publication may include preliminary versions. However, preliminary versions are not marked as such. Documents Related to Devices Document Name µ PD753104, 753106, 753108 Data Sheet µ PD75P3116 Data Sheet µ PD753108 User’s Manual 75XL Series Selection Guide Documents Related to Development Tools (Software) (User’s Manuals) Document Name...
  • Page 66 Other Related Documents Document Name SEMICONDUCTOR SELECTION GUIDE – Products & Packages – Semiconductor Device Mounting Technology Manual Quality Grades on NEC Semiconductor Devices NEC Semiconductor Device Reliability/Quality Control System Guide to Prevent Damage for Semiconductor Devices by Electrostatic Discharge (ESD) Caution The related documents listed above are subject to change without notice.
  • Page 67 µ PD75P3116 [MEMO] Data Sheet U11369EJ3V0DS...
  • Page 68 NOTES FOR CMOS DEVICES PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred.
  • Page 69 Some information contained in this document may vary from country to country. Before using any NEC product in your application, pIease contact the NEC office in your country to obtain a list of authorized representatives and distributors. They will verify: •...
  • Page 70 The export or re-export of this product from a country other than Japan may also be prohibited without a license from that country. Please call an NEC sales representative.

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