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Figure No.
3-1.
Pin Input/Output Circuit of List .......................................................................................................
4-1.
Pin Input/Output Circuit of List .......................................................................................................
5-1.
Memory Map ( PD78052, 78052Y) ...............................................................................................
5-2.
Memory Map ( PD78053, 78053Y) ...............................................................................................
5-3.
Memory Map ( PD78054, 78054Y) ...............................................................................................
5-4.
Memory Map ( PD78P054) ...........................................................................................................
5-5.
Memory Map ( PD78055, 78055Y) ...............................................................................................
5-6.
Memory Map ( PD78056, 78056Y) ...............................................................................................
5-7.
Memory Map ( PD78058, 78058Y) ...............................................................................................
5-8.
Memory Map ( PD78P058, PD78P058Y) ...................................................................................
5-9.
Data Memory Addressing ( PD78052, 78052Y) ...........................................................................
5-10.
Data Memory Addressing ( PD78053, 78053Y) ...........................................................................
5-11.
Data Memory Addressing ( PD78054, 78054Y) ...........................................................................
5-12.
Data Memory Addressing ( PD78P054) .......................................................................................
5-13.
Data Memory Addressing ( PD78055, 78055Y) ...........................................................................
5-14.
Data Memory Addressing ( PD78056, 78056Y) ...........................................................................
5-15.
Data Memory Addressing ( PD78058, 78058Y) ...........................................................................
5-16.
Data Memory Addressing ( PD78P058, 78P058Y) ......................................................................
5-17.
Program Counter Configuration ....................................................................................................
5-18.
Program Status Word Configuration .............................................................................................
5-19.
Stack Pointer Configuration ...........................................................................................................
5-20.
Data to be Saved to Stack Memory ...............................................................................................
5-21.
Data to be Reset from Stack Memory ...........................................................................................
5-22.
General Register Configuration .....................................................................................................
6-1.
Port Types .....................................................................................................................................
6-2.
P00 and P07 Block Diagram .........................................................................................................
6-3.
P01 to P06 Block Diagram ............................................................................................................
6-4.
P10 to P17 Block Diagram ............................................................................................................
6-5.
P20, P21, P23 to P26 Block Diagram ...........................................................................................
6-6.
P22 and P27 Block Diagram .........................................................................................................
6-7.
P20, P21, P23 to P26 Block Diagram ...........................................................................................
6-8.
P22 and P27 Block Diagram .........................................................................................................
6-9.
P30 to P37 Block Diagram ............................................................................................................
6-10.
P40 to P47 Block Diagram ............................................................................................................
6-11.
Block Diagram of Falling Edge Detection Circuit ...........................................................................
6-12.
P50 to P57 Block Diagram ............................................................................................................
6-13.
P60 to P63 Block Diagram ............................................................................................................
6-14.
P64 to P67 Block Diagram ............................................................................................................
6-15.
P70 Block Diagram ........................................................................................................................
6-16.
P71 and P72 Block Diagram .........................................................................................................
6-17.
P120 to P127 Block Diagram ........................................................................................................
LIST OF FIGURES (1/8)
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