A/D Converter Mode Register Format - NEC PD78052 User Manual

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Symbol
CS TRG FR1
ADM
ADM3 ADM2 ADM1
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1
1
FR1 FR0 HSC
0 0 1
0 1 1
1 0 0
1 0 1
Other than above
TRG External Trigger Selection
0 No external trigger (software starts)
1 Conversion started by external trigger (hardware starts)
CS A/D Conversion Operation Control
0 Operation stop
1 Operation start
Notes 1. Set so that the A/D conversion time is 19.1 s or more.
2. Setting prohibited because A/D conversion time is less than 19.1 s.
Cautions 1. The following sequence is recommended for power consumption reduction of A/D
converter when the standby function is used: Clear bit 7 (CS) to 0 first to stop the
A/D conversion operation, and then execute the HALT or STOP instruction.
2. When restarting the stopped A/D conversion operation, start the A/D conversion
operation after clearing the interrupt request flag (ADIF) to 0.
Remarks 1. f
X
2. MCS : Bit 0 of oscillation mode selection register (OSMS)
270
CHAPTER 14 A/D CONVERTER
Figure 14-3. A/D Converter Mode Register Format
4 3 2 1 0
FR0 ADM3 ADM2 ADM1 HSC
Analog Input Channel Selection
ANI0
ANI1
ANI2
ANI3
ANI4
ANI5
ANI6
ANI7
Note 1
A/D Conversion Time Selection
f = 5.0 MHz Operation
X
MCS = 1 MCS = 0
Note 2
80/f ( ) 160/f (32.0 s)
Setting prohibited
X X
Note 2
40/f ( Setting prohibited ) 80/f ( Setting prohibited
X X
Note 2
50/f ( ) 100/f (20.0 s)
Setting prohibited
X X
100/f (20.0 s) 200/f (40.0 s)
X X
Setting prohibited
: Main system clock oscillation frequency
After
Address R/W
Reset
FF80H 01H R/W
f = 4.19 MHz Operation
X
MCS = 1
80/f (19.1 s)
X
Note 2 Note 2
) 40/f ( Setting prohibited
X
Note 2
50/f (
Setting prohibited
X
100/f (23.8 s)
X
MCS = 0
160/f (38.1 s)
X
) 80/f (19.1 s)
X
) 100/f (23.8 s)
X
200/f (47.7 s)
X