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Section 6 - - Theory of Operation
Figure 6-4. PCIO BOARD Components
6-2-2-1.
Digital Output Circuit
The purpose of the output circuit is to move data out of the PCI to Add-on FIFO as pixels are written to it,
after an SOL (Start of Line) signal has been issued by the MCS. The data passes through the Digital I/O
Controller FPGA from the PCI to Add-on FIFO. The PCIO Interface FPGA arbitrates use of the Add-on
Data Bus for the passage of data. Following is a typical output sequence:
1. Reset the output interface.
2. Write the number of pixels per line into a transfer counter.
3. Configure the PCIO Interface chip for bus mastership and to interrupt upon transfer count completion.
4. Issue the print command to the MCS.
2005 July Rev. B
7F3318
6-5
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Troubleshooting
