Delayed Interrupt Module Registers - Fujitsu FR60 Hardware Manual

10.2 Delayed Interrupt Module Registers

This section describes the configuration and functions of the registers used by the
delayed interrupt module.
■ Delayed Interrupt Module Registers
The delayed interrupt module includes the delayed interrupt control register (DICR).
Figure 10.2-1 shows the configuration of the delayed interrupt control register (DICR).
Figure 10.2-1 Configuration of the Delayed Interrupt Control Register (DICR)
bit 7
-
■ Delayed Interrupt Control Register (DICR)
The delayed interrupt control register (DICR: Delayed Interrupt Control Register) controls
delayed interrupts.
Figure 10.2-2 shows the bit configuration of the delayed interrupt control register (DICR).
Figure 10.2-2 Bit Configuration of the Delayed Interrupt Control Register (DICR)
Address: 000044
H
The following describes the bit functions of the delayed interrupt control register (DICR) bits.
[bit0] DLYI
This bit controls the generation and clearing of the pertinent interrupt source.
Table 10.2-1 shows the function for the generation and clearing of the pertinent interrupt source.
Table 10.2-1 Functions for Generation and Clearing the Pertinent Interrupt Source
DLYI
0
1
6 5 4 3
- - - -
bit 7 6 5
- - -
A delayed interrupt source is cleared or no request exists. [initial value]
A delayed interrupt source is generated.
CHAPTER 10 DELAYED INTERUPT MODULE
2 1 0
Delayed interrupt control register
- - DLYI
(DICR)
4 3 2 1
- - - -
Description
0 Initial value
-------0
DLYI
B
R/W
327