Setting Up The Instruction Cache Before Use - Fujitsu FR60 Hardware Manual

CHAPTER 3 CPU AND CONTROL UNITS
3.3.4

Setting up the Instruction Cache before Use

This section describes how to set up the instruction cache before it is used.
■ Setup Procedure
Before using the instruction cache, set it up as follows:
❍ Initialization
Before the instruction cache is used, it must be cleared.
Set the FLSH and ELKR bits of the register to "1" to delete past data.
ldi
ldi
stb
This initializes the instruction cache.
❍ Enabling the instruction cache (ON)
To enable the instruction cache, set the ENAB bit to "1".
ldi
ldi
stb
Any subsequent instruction access is loaded into the instruction cache.
The instruction cache can be enabled at the same time it is initialized.
ldi
ldi
stb
60
#0x000003E7, r0 // I-Cache control register address
#0B00000110, r1 // FLSH bit (Bit 1)
// ELKR bit (Bit 2)
r1, @r0 // Write to the register
#0x000003E7, r0 // I-Cache control register address
#0B00000001, r1 // ENAB bit (Bit 0)
r1, @r0 // Write to the register
#0x000003E7, r0 // I-Cache control register address
#0B00000111, r1 // ENAB bit (Bit 0)
// FLSH bit (Bit 1)
// ELKR bit (Bit 2)
r1, @r0 // Write to the register