4.5.6
External Wait Cycle
This section shows the operation timing for the external wait cycle.
■ External Wait Cycle Timing
Figure 4.5-6 shows the operation timing for (TYP3 to TYP0=0001
A31 to A00
RD
READ
D31 to D00
WRn
WRITE
D31 to D00
•
Setting "1" for the TYP0 bit of the ACR register and enabling the external RDY input pin
enables external wait cycles to be inserted.
•
In Figure 4.5-6, the oblique-lined portion of the RDY pin is invalid because the wait based on
the automatic wait cycle remains in effect.
The value at the RDY input pin is evaluated from the last automatic wait cycle on.
Once a wait cycle is completed, the value at the RDY input pin remains invalid until the next
access cycle is started.
Figure 4.5-6 Timing Chart for the External Wait Cycle
Basic cycle
MCLK
AS
CSn
RDY
CHAPTER 4 EXTERNAL BUS INTERFACE
2 auto-wait cycles Wait cycle by RDY
Release
Wait
, AWR=2008
).
B
H
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