Precautions On Handling The Device - Fujitsu FR60 Hardware Manual

CHAPTER 2 HANDLING THE DEVICE
2.1

Precautions on Handling the Device

This section contains information on preventing a latch up and on the handling of
pins.
■ Preventing a Latch Up
A latch up can occur if, on a CMOS IC, a voltage higher than V
applied to an input or output pin or a voltage higher than the rating is applied between V
and V
SS
cause thermal destruction of an element. When you use a CMOS IC, be very careful not to
exceed the maximum rating.
■ Unused Input Pins
Do not leave an unused input pin open, since it may cause a malfunction. Handle by using a
pull-up or pull-down resistor.
■ Power Supply Pins
If more than one V
designed to be connected to one other inside the device to prevent malfunctions such as latch
up. Be sure to connect the pins to a power supply and ground external to the device to minimize
undesired electromagnetic radiation, prevent strobe signal malfunctions due to an increase in
ground level, and conform to the total output current rating. Given consideration to connecting
the current supply source to V
It is also recommended that a ceramic capacitor of around 0.1 µF be connected between V
and V
SS
■ Quartz Oscillation Circuit
Noise near the X0 or X1 pin may cause the device to malfunction. Design printed circuit boards
so that X0, X1, the quartz oscillator (or ceramic oscillator), and the bypass capacitor to ground
are located as near to one another as possible.
It is strongly recommended that printed circuit board artwork that surrounds the X0 and X1 pins
with ground be used to increase the expectation of stable operation.
Please ask the crystal maker to evaluate the oscillational characteristics of the crystal and this
device.
■ External Clock
When using an external clock, in general supply it to the X0 pin while also supplying a reverse-
phase clock to the X1 pin simultaneously. In this case, do not use the STOP mode (oscillation
stop mode), since the X1 pin stops with "H" level output in STOP mode.
Additionally, the X0 pin can be used only if an external clock is supplied at 12.5 MHz.
Figure 2.1-1 and Figure 2.1-2 show examples of using an external clock.
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pin. A latch up, if it occurs, significantly increases the power supply current and may
or V pin exist, those that must be kept at the same potential are
CC SS
or V
CC
at circuit points close to the device as a bypass capacitor.
of the device at the lowest impedance possible.
SS
or a voltage lower than V
CC
is
SS
pin
CC
CC