Intel MCS48 User Manual page 97

Family of single chip microcomputers
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INSTRUCTION SET
Example:
Decrement
contents
of
external
data
memory
location
63.
MOV
R0,#3FH
MOVX
A,@R0
DEC
A
MOVX
@R0,A
MOVE
'3F'
HEX TO REG
MOVE CONTENTS
OF LOCATION
63
TO ACC
DECREMENT ACC
MOVE CONTENTS
OF
ACC TO
LOCATION
63
IN
EXPANDED
MEMORY
DEC
R
r
Decrement
Register
(Not
in
8021, 8022)
1100
1
r r
r
The
contents
of
working
register
'r'
are
decremented
by
one.
(Rr)-*- (Rr)-1
r=0-7
Example:
DECR1:
DEC
R1
DECREMENT
CONTENTS
OF REG
1
DIS
I
Disable External
Interrupt
(Not
in
8021)
000
1
10
1
External interrupts are disabled.
A
low
signal
on
the
interrupt
input pin
has
no
effect.
DIS
TCNTI
Disable
Timer/Counter
Interrupt
(Not
in
8021)
00
11
10
1
Timer/counter
interrupts
are disabled.
Any
pending
timer
interrupt
request
is
cleared.
The
interrupt
sequence
is
not
initiated
by an
overflow, but the
timer
flag
is
set
and
time accumulation continues.
DJNZ
R
r
,
address
Decrement
Register
and
Test
1110
1
r
r r
a
7
a
6
a
5
a
4
a 3 a
2
a-|
a
This
is
a 2-cycle
instruction.
Register
Y
is
decremented and
tested
for zero.
If
the
register
contains
all
zeros,
program
control
falls
through
to
the next
instruction.
If
the
register
contents
are not
zero, control
jumps
to
the specified
'address'.
The
address
in
this
case
must
evaluate
to
8-bits,
that
is,
the
jump
must
be
to
a location within the current
256-location page.
(Rr)-*- (Rr)-1
If
Rr not
(PC0-7H-
addr
r=0-7
Mnemonics
copyright
Intel
Corporation
1976.
4-15

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