Intel MCS48 User Manual page 319

8255A/8255A-5
Output
Control Signal Definition
OBF
(Output Buffer
Full F/F).
The
OBF
output
will
go
"low"
to indicate that
the
CPU
has
written
data out
to
the specified
port.
The
OBF
F/F
will
be
set by the
rising
edge
of
the
WR
input
and
reset
by
ACK
Input
being
low.
ACK
(Acknowledge
Input).
A
"low" on
this
input informs
the
8255A
that
the data
from
port
A
or port
B
has been
ac-
cepted.
In
essence, a response from
the peripheral
device indicating that
it
has
received the data output by
the
CPU.
INTR
(Interrupt Request).
A
"high"
on
this
output can be
used
to interrupt the
CPU
when
an output
device
has
ac-
cepted data
transmitted
by
the
CPU. INTR
is
set
when
ACK
is
a "one",
OBF
is
a "one" and INTE
is
a "one".
It
is
reset by the
falling
edge
of
WR.
INTE
A
Controlled by
bit set/reset
of PCg.
INTEB
Controlled
by
bit set/reset
of
PC
2.
MODE
1
(PORT
A)
CONTROL
WORD
°7
D
6
D
5
P
4
D
3
D
2
D
1
D
'-*
1
= INPUT
WR »-0
PA
7
-PA„
k>
i
inte"!
rc
„
I
A
I
6
-or*;—
OBF
A
ACK.
MODE
1
(PORT
B)
CONTROL
WORD
D
7
D
6
D
5
D
4
D
3
D
2
D,
D
hMxMxHoM
WR
»-0
r
-1
1
INTE
1
1
B
1
PBj-PB,,
PC,
PC
2
^>
ACKg
Figure
8.
MODE
1
Output
Figure
9.
Mode
1
(Strobed Output)
8-29
00744A