Of Locations - Intel MCS48 User Manual

INSTRUCTION SET
STRT
CNT
Start
Event
Counter
100
10
1
Example:
The
test
1
(T1) pin
is
enabled
as the event-counter
input
and
the
counter
is
started.
The
event-counter
register
is
incremented
with
each
high-to-low transition
on
the
T1
pin.
Initialize
and
start
event counter.
Assume
overflow
is
desired with
first
T1
input.
STARTC: EN TCNTI
MOV
A,#0FFH
MOV
T,A
STRT
CNT
ENABLE
COUNTER INTERRUPT
MOVE
'FF'
HEX
(ONES)
TO
ACC
MOVE ONES TO COUNTER
ENABLE
T1
AS
COUNTER
INPUT
AND
START
STRT
T
Start
Timer
10
1
10
1
Timer accumulation
is
initiated in
the timer
register.
The
register
is
incremented
every 32 instruction cycles.
The
prescaler
which counts the
32 cycles
is
cleared
but the timer register
is
not.
Example:
Initialize
and
start
timer.
STARTT:
CLR A
MOV
T,A
EN TCNTI
STRTT
CLEAR
ACC TO
ZEROS
MOVE
ZEROS TO
TIMER
ENABLE
TIMER INTERRUPT
START TIMER
SWAP
A
Swap
Nibbles Within
Accumulator
100 111
Bits
0-3
of
the
accumulator are
swapped
with
bits
4-7
of
the
accumulator.
(A 4
.
7
)X(A
-3)
Example:
Pack
bits
0-3
of
locations 50-51
into
location 50.
PCKDIG:
MOV
R0,
#50
MOV
R1,
#51
XCHD
A,@R0
SWAP
A
XCHD
A,@R1
MOV
@R0,A
MOVE
'50'
DEC TO REG
MOVE
'51'
DEC TO REG
1
EXCHANGE
BITS 0-3
OF
ACC
AND LOCATION
50
SWAP
BITS
0-3
AND
4-7
OF
ACC
EXCHANGE
BITS
0-3
OF
ACC AND
LOCATION
51
MOVE CONTENTS OF
ACC TO
LOCATION
50
Mnemonics copyright
Intel
Corporation 1976.
4-34