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8041A/8741A
Mnemonic
Description
Bytes
Cycles
Mnemonic
Description
Bytes
Cycles
CONTROL
CLRF1
Clear F1 Flag
1
1
EN
DMA
Enable
DMA
Handshake
Lines
1
1
CPLF1
Complement
F1 Flag
1
1
EN
I
Enable IBF
Interrupt
1
1
MOV
STS,
A
A4-A7
to Bits
4-7
of
Status
1
1
OIS
I
Disable
IBF
Interrupt
1
1
EN
FLAGS
Enable Master
Interrupts
1
1
SEL RBO
Select
register
bank
1
1
BRANCH
SEL
RB1
NOP
Select
register
bank
1
No
Operation
1
1
1
1
JMP
addr
JMPP@A
Jump
unconditional
Jump
indirect
2
1
2
2
REGISTERS
DJNZ
R.addr
Decrement
register
and
skip
2
2
INC
Rr
Increment
register
1
1
JC
addr
Jump
on
Carry
=1
2
2
INC
@Rr
Increment data
memory
1
1
JNCaddr
Jump
on
Carry
=
2
2
DEC
Rr
Decrement
register
1
1
JZ
addr
Jump
on
A
Zero
2
2
JNZ
addr
Jump
on
A
not
Zero
2
2
SUBROUTINE
JTO
addr
Jump
on
TO
=
1
2
2
CALL
addr
Jump
to
subroutine
2
2
JNTO
addr
Jump
on T0
=
2
2
RET
Return
1
2
JT1 addr
Jump
on
T1
=
1
2
2
RETR
Return
and
restore status
1
2
JNT1
addr
Jump
on
T1
=0
2
2
FLAGS
JFO
addr
Jump
on F0
Flag
=
1
2
2
JF1 addr
Jump
on
F1
Flag=
1
2
2
CLRC
Clear Carry
1
1
JTF
addr
Jump
on Timer
Flag
=
1
,
Clear Flag
2
2
CPLC
Complement
Carry
1
1
JNIBFaddr
Jump
on IBF
Flag
=
2
2
CLRFO
Clear Flag
1
1
JOBF
addr
Jump
on
OBF
Flag=
1
2
2
CPLFO
Complement
Flag
1
1
JBb
addr
Jump
on Accumulator
Bit
2
2
APPLICATIONS
TO
}
PERIPHERAL
DEVICES
RD
8
m
PORT
BUS
8041
A/
8741
to
CO
Dbb
TO
>
PERIPHERAL
DEVICES
Figure
1.
808SA-8041A
Interface
Figure
2.
8048-8041A
Interface
8243
EXPANDER
<z
KEYBOARD
MATRIX
8
ROWS
~7Sr
8041A/8741A
DBB
CONTROL
DOT
MATRIX PRINTER
FORM
PRINT
L.F.
HOLD
SOLENOIDS
z
A
z
i
t-
1-
(/)
O
MOTOR
0.
SOLENOID
DRIVERS
1-
z
or
O
a.
O
Ill
UJ
DRIVERS
•\
z
7
OR
9
PORT
2
PORT
2
8041A/8741A
PORT
1/PORT
2
DBB
CONTROL
CONTROL
BUS
CONTROL
BUS
Figure
3.
8041A-8243 Keyboad Scanner
Figure
4.
8041A
Matrix
Printer Interface
8-116
001
88
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