Intel MCS48 User Manual page 182

8049/8039/8039-6
INSTRUCTION SET
Mnemonic
Description
Bytes Cycle
ADD
A,
R Add
register
to
A
ADD
A,
@R
Add
data
memory
to
A
ADD
A, #data
Add
immediate
to
A
2
ADDC
A,
R Add
register
with
carry
ADDC
A,
@R
Add
data
memory
with carry
ADDC
A, #data
Add
immediate with carry 2
ANL
A,
R And
register to
A
AN
LA,
@R
And
data
memory
to
A
ANL
A, #data
And
immediate
to
A
2
ORL
A,
R
Or
register
to
A
OR
LA,
@R
Or
data
memory
to
A
3
ORL
A, #data Or immediate
to
A
2
b
3
XRLA,
R
Exclusive
Or
register to
A
u
XRLA, @R
Exclusive or data
memory
to
A
XRLA,
#data
INC
A
DEC A
CLR A
CPLA
DA A
SWAP A
RLA
RLC A
RR A
RRC A
Exclusive or
immediate
to
A
Increment
A
Decrement
A
Clear
A
Complement
A
Decimal Adjust
A
Swap
nibbles of
A
Rotate
A
left
Rotate
A
left
through
carry
Rotate
A
right
Rotate
A
right
through carry
2
IN A, P
Input port to
A
2
OUTL
P,
A
Output
A
to port
2
ANL
P,
#data
And
immediate
to port
2
3
ORL
P,
#data
Or immediate
to
port 2
3
INS
A,
BUS
Input
BUS
to
A
2
o OUTL
BUS,
A
Output
A
to
BUS
2
3
a
ANL
BUS,#data
And
immediate
to
BUS
2
c
ORL
BUS,#data
Or immediate
to
BUS
2
MOVD
A, P Input
Expander
port
to
A
2
MOVD
P,
A
Output
A
to
Expander
port
2
ANLD
P,
A And A
to
Expander port
2
ORLD
P,
A
Or
A
to
Expander
port
2
•
INCR
Increment
register 1
tt INC
@R
Increment data
memory
1
ac
DECR
Decrement
register
1
JMP
addr
Jump
unconditional 2
2
JMPP
@A
Jump
indirect
1
2
DJNZR,
addr
Decrement
register
and
skip 2
2
JC addr
Jump
on
Carry
=
1
2 2
JNCaddr
Jump
on Carry
=
2
2
J
Z
addr
Jump on
A
Zero 2
2
JNZaddr
Jump
on
A
not Zero 2 2
JTO addr
Jump
on
TO =
1
2 2
re
JNTO
addr
Jump on
TO =
2 2
00
JT1 addr
Jump on T1
=1
2
2
JNT1
addr
Jump on
T1
= 2 2
JFOaddr
Jump
on
FO
=
1
2 2
JF1 addr
Jump
on F1
=
1
2
2
JTF addr
Jump on
timer
flag
2 2
JNI addr
Jump
on INT = 2 2
JBb
addr
Jump on Accumulator
Bit
2 2
Description
Bytes Cycles
c
CALL
Jump
to subroutine 2
2
3
O
RET
Return
1
2
.0
3
CO
RETR
Return and
restore status
1
2
CLR C
Clear
Carry
1
1
CPL C Complement
Carry
1 1
Ol
CLR
FO
Clear Flag
1 1
LL
CPL
FO Complement
Flag
1
1
CLR
F1 Clear Flag
1 1 1
CPL
F1
Complement
Flag
1 1 1
MOV
A,
R
Move
register to
A
1
1
MOV
A,
@R
Move
Jata
memory
to
A
1
1
MOV
A, #data
Move immediate
to
A
2
2
MOV
R,
A
Move
A
to register
1
1
MOV
@R,
A
Move
A
to data
memory
1
1
MOV
R, #data
Move
immediate
to register
2
2
01
>
MOV
@R,
#data
Move immediate
to data
memory
2 2
O
Move
A,
PSW
Move
PSW
to
A
1
1
re
MOV
PSW,
A
Move
A
to
PSW
1 1
re
Q XCH
A,
R
Exchange
A
and
register
1
1
XCHA,@R
Exchange
A
and
data
memory
1 1
XCHD
A,
@R
Exchange
nibble of
A
and
register
1 1
MOVX
A,
@R
Move
external data
memory
to
A
1
2
MOVX
@R,
A
Move
A
to external data
memory
1
2
MOVP
A,
@A
Move
to
A
from
current page
1
2
MOVP3
A,
@A
Move
to
A
from Page 3
1
2
MOV
A,
T Read Timer/Counter
1
1
0)
MOV
T,
A
Load Timer/Counter
1
1
3
STRTT
Start
Timer
1
1
o STRT CNT
Start
Counter
1
1
<5
STOP
TCNT
Stop Timer/Counter
1
1
E
ENTCNTI
Enable
Timer/Counter Interrupt
1 1
DISTCNTI
Disable
Timer/Counter Interrupt
1 1
EN
I
Enable external interrupt
1
1
DISI
Disable external interrupt
1
1
SELRBO
Select register
bank
1
1
o
o
SELRB1
Select register
bank
1 1
1
SEL MBO
Select
memory
bank
1
1
SEL MB1
Select
memory
bank
1
1
1
ENTOCLK
Enable Clock output
p
TO
1 1
NOP No
Operatior.
Mnemonics
copyright
Intel
Corporation
1976, 1977,
1978
6-30