Intel MCS48 User Manual page 43

Family of single chip microcomputers
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SINGLE
COMPONENT
SYSTEM
Device
Testable
Jump
Conditions
(Jump On)
not
all
Accumulator
All
zeros
zeros
Accumulator
Bit
1
Carry Flag
User
Flags
(FO, F1)
Timer Overflow
Flag
Test Inputs
(TO,
T1)
Interrupt Input
(INT)
1
1
1
1
2.1.9
Interrupt
An
interrupt
sequence
is
initiated
by
applying
a
low
"0"
level
input to
the
INT
pin.
Interrupt
is
level
triggered
and
active
low
to
allow
"WIRE
ORing"
of
several
interrupt
sources
at
the
input
pin.
The
Interrupt
line
is
sampled
every
machine
cycle during
ALE
and
when
detected
causes a "jump
to
subroutine"
at
location
3
in
program
memory
as
soon
as
all
cycles
of
the
current
instruction
are complete.
As
in
any
CALL
to
subroutine, the
Program Counter
CONDITIONAL
JUMP
LOGIC
TIMER
INT_
RECOGNIZED
EXECUTED
EN TCNTI
EXECUTED"
DIS
TCNTI
EXECUTED
^L>
TIMER
INT
ENABLE
r^-^O
EXTERNAL
INTERRUPT
RECOGNIZED
TIMER
INTERRUPT
RECOGNIZED
S
Q
INTERRUPT
IN
PROGRESS
FF
A
RETR
EXECUTED
NOTE:
1.
INT
INPUT
IS
SAMPLED
BY
ALE
EVERY MACHINE CYCLE
EXCEPT
FIRST
CYCLE OF DOUBLE CYCLE
INSTRUCTION.
2.
WHEN
INTERRUPT
IN
PROGRESS
f/f
IS
SET
ALL
FURTHER
INTERRUPTS
ARE LOCKED OUT INDEPENDENT OF STATE
OF
EITHER
INTERRUPT ENABLE
f/f.
3.
WHILE TIMER INTERRUPTS
ARE
DISABLED TIMER
OVERFLOW
f/f
WILL
NOT STORE ANY OVERFLOW THAT
OCCURS. TIMER
FLAG
WILL BE
SET,
HOWEVER.
INTERRUPT LOGIC
2-7

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