Intel MCS48 User Manual page 241

2101A
FAMILY
A.C.
CHARACTERISTICS FOR
2101A-2
(250 ns
ACCESS
TIME)
READ CYCLE
T
A
=
0°C
to 70°C,
V
Cc = 5V
±5%, unless otherwise
specified.
Symbol
Parameter
Min.
x
f
]
Typ. Max.
Unit
Test Conditions
tRC
Read Cycle 250
ns
t A
Access
Time
250
ns
t
r
,
t
f
=
20ns
tco
Chip Enable
To
Output 180
ns Input Levels
=
0.8V
or
2.0V
t
OD
Output
Disable
To Output
130
ns
Timing
Reference = 1.5V
t
DF
[3]
Data
Output
to
High
Z
State 180
ns
Load
=
1
TTL
Gate
tQH
Previous
Read Data
Valid
after
change
of
Address
40 ns
and C
L
= 100pF.
WRITE CYCLE
Symbol
Parameter
Min.
x
Ml
Typ. Max.
Unit Test Conditions
tWC
Write Cycle 170
ns
tAW Write Delay
20
ns
t
r
,
t
f
=
20ns
tew
Chip Enable
To
Write 150
ns
Input Levels
=
0.8V
or
2.0V
tow Data Setup
150
ns
Timing
Reference = 1.5V
tDH
Data Hold
ns
Load
=
1
TTL
Gate
t
W
p
Write
Pulse
150
ns
and
C
L
= 100pF.
tWR Write
Recovery
ns
t
DS
Output
Disable
Setup
20
ns
[2]
CAPACITANCE
t
a
=
25°c,
f
=
1
MHz
Symbol
Test
Limits (pF)
Typ.lD
Max.
C
IN
Input Capacitance
(All
Input
Pins) V,
N
=
0V
4 8
Qdut
Output
Capacitance
Vqut
=
0V
8 12
WAVEFORMS
READ
CYCLE
WRITE CYCLE
3RESS
V
(COMMON
I/O]
l41
\'
ADDRESS
\(
\
/Z
\
:x
/
/
w
-"
—
(COMMON
I/O) '
4
I
NOTES:
1.
Typical
values are for
T A
=
25°
C
and nominal
supply
voltage.
2.
This parameter
is
periodically sampled and
is
not
100%
tested.
3.
top
is
with
respect to the
trailing edge of CE-|,CE2,
or
OD,
whichever
occurs
first.
)C
V
/
::nx
J
J
4.
OD
should be
tied
low
for separate I/O operation.
7-3